1 2 3 4 5 6 7 8 VER : 1A VM9/VM8 Block Diagram A A Celeron M540 POWER (478 Pin) SYSTEM RESET CIRCUIT POWER EMC1423-1-AIZL-TR PG 31 REGULATOR CLOCK SLG8SP513V (QFN-64) PG 3,4 PG 36 CPU VR +1.5V_RUN/+1.05V_VCCP PG 35 BATT CHARGER AC/BATT CONNECTOR PG 42 FAN & THERMAL PG 37 REGULATOR REGULATOR +1.8V_SUS/+1.25V_RUN /+0.9V_DDR_VTT PG 17 PG 39 +3.3V_ALW/+5V_SUS/+15V_ALW PG 38 PG 40 533 MHz FSB RUN POWER SW +3.3V_SUS/+5V_SUS +5V/+3.3V/+1.8V PG 41 LVDS Panel Connector (WXGA) PG 18 Crestline 965GM B DDR2-SODIMM*2 533 MHZ DDR II VGA B CRT CONN. 1299 uFCBGA PG 19 PG 15,16 PG 5,6,7,8,9,10 SATA-ODD SATA DMI interface PG 28 SATA-HDD PG 28 USB2.0 x 2 Bluetooth PG 26 PG 27 SATA USB 2.0 RJ45/Magnetics RTL8102EL PCIE ICH8-M C USB conn x 2 (10/100) PG 34 PG 34 676 BGA PCIE IHDA MINI-CARD WLAN PG 11,12,13,14 C PG 26 AUDIO/AMP CX20561-12Z TPA6017A2 PG 32 LPC MODEM (AMOM) CX20548-11Z 33MHz PCI PG 33 KBC ITE8502 Audio SPK conn 2Wx1 Audio Jacks x3 PG 32 1394 SPI PG 33 D 18X8 Keyboard PG 29 PG 23 RJ-11conn PG 32 3-in-1 Card Reader PCMCIA IEEE1394 R5C847 PG 20 1394 CONN. Card Reader CONN. PCMCIA CONN. PG 22 PG 21 PG 21 PS/2 FLASH 2M bytes Touchpad PG 24 PG 29 USER INTERFACE PG 20 D QUANTA COMPUTER Title Schematic Block Diagram 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, July 18, 2008 7 Rev 1A Sheet 1 of 8 53 1 2 3 4 5 6 Table of Contents PAGE 1 2 A 5-10 Crestline 11-14 ICH8M 15-16 DDRII SO-DIMM(200P) 17 Clock Generator 18 HDMI 23 LCD Conn. & SSP 24 CRT Conn 25 SATA Conn 28 CARD READER/Conn & 1394 Express Card & Smart Card Mini Card SIO (ITE8512) 32 FLASH/RTC 33 USB 35 TP / KEYBOARD 36 SWITCH /LED 37 FAN & Thermal 38-39 40-41 44 46 48 49 POWER PLANE Front Page Merom 29-30 31 B DESCRIPTION VOLTAGE PAGE 8 CONTROL SIGNAL DESCRIPTION Schematic Block Diagram 3-4 26-27 7 Power States Audio CODEC(ALC888)/Phone Jack +PWR_SRC 10V~+19V +RTC_CELL +3.0V~+3.3V 4,26,32,34,46,48,49,51,52,56 MAIN POWER S0~S5 11,14,31,32 RTC S0~S5 +3.3V_ALW +3.3V 3,31,32,34,36,37,38,44,46,49,52,53,54 8051 POWER ALWON S0~S5 +5V_ALW +5V 35,36,46,48,49,52,53,54,56 LCD/CHARGE POWER ALWON S0~S5 +15V_ALW +15V 26,36,37,52,53 LARGE POWER +5V_ALW S0~S5 +3.3V_LAN +3.3V 42,43 LAN POWER AUX_ON +5V_SUS +5V 14,38,51,53 SLP_S5# CTRLD POWER SUS_ON +3.3V_SUS +3.3V 3,11,12,13,14,26,30,37,38,43,48,49,51,53 SLP_S5# CTRLD POWER 3.3V_SUS_ON +1.8V_SUS +1.8V 6,8,9,15,48,49,53 SODIMM POWER DDR_ON +0.9V_DDR_VTT +0.9V 16,49,53 SODIMM POWER 0.9V_DDR_VTT_ON +5V_RUN +5V 14,18,27,36,37,38,39,40,41,53 SLP_S3# CTRLD POWER RUN_ON 14,18,27,36,37,38,39,40,41,53 +3.3V_RUN +3.3V SLP_S3# CTRLD POWER 3.3V_RUN_ON +1.8V_RUN +1.8V 18,38,53 SDVO POWER RUN_ON +1.5V_RUN +1.5V 4,9,14,30,33,34,48,53,56 CALISTOGA/ICH8 POWER 1.5V_RUN_ON System Reset Circuit +1.25V_RUN +1.25V 6,9,14,49,53 CALISTOGA/ICH8 POWER 1.25V_RUN_ON Battery Selector & Charger 1.05VCCP / 1.5VRUJN +1.05V_VCCP +1.05V 3,4,5,6,8,9,11,14,48,56 CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON A B LOM / Switch 51 DDR2_1.8VSUS, 0.9V CPU_ISL6266(2phase) 52 MAX8744 (+5.5V,+3,3V) 4,51,56 CPU CORE POWER IMVP_VR_ON +LCDVCC +3.3V 26 LCD Power LCDVCC_TST_EN & ENVDD +VCC_CORE +0.7V~+1.77V 53 RUN Power Switch +5V_MOD +5V 36 Module Power MODC_EN# 54 +5V_HDD +5V 36 HDD Power HDDC_EN# 55 DCIN,Batt PAD& SCREW 56 EMI CAP +PBATT +10V~+17V MAIN BATTERY CHG_PBATT 57 SMBUS BLOCK Power Block Dianram +SBATT +10V~+17V SECOND BATTERY CHG_SBATT 58 ACTIVE IN C C GND PLANE PAGE 8731AGND DESCRIPTION 46 AGND_0.9V 49 AGND_DC/DC 52 AGND_DC2 48 AGND_DDR 49 AGND_ISL6260 51 GND ALL D D QUANTA COMPUTER Title Index & Power Status 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 7 Rev 1A Sheet 2 of 8 53 RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10] ET11 ET17 ET16 ET15 ET22 ET21 ET20 ET19 1 1 1 1 1 1 1 1 H_DSTBN#0 H_DSTBN#2 H_DSTBP#2 H_D#41 H_DSTBN#3 H_DSTBP#3 H_D#50 H_D#58 G6 E4 Layout Note: Place R44 close to CPU. R40 51/F 10 PROCHOT# THERMDA THERMDC THERMTRIP# H_RESET# 5 H_RS#0 H_RS#1 H_RS#2 H_TRDY# H_HIT# H_HITM# 56 H_DSTBN#0 H_DSTBP#0 H_DINV#0 5 H_D#[0..63] 1 D21 A24 B25 H_PROCHOT# H_THERMDA H_THERMDC C7 H_THERM R44 56 1 2 R380 1K/F +1.05V_VCCP PAD T3 H_THERMDA 31 H_THERMDC 31 5 5 5 H_DSTBN#1 H_DSTBP#1 H_DINV#1 V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6 R379 2K/F +1.05V_VCCP A22 A21 CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17 6,17 CPU_MCH_BSEL0 6,17 CPU_MCH_BSEL1 6,17 CPU_MCH_BSEL2 C487 *2200P_NC H_THERMDA H_THERMDC 1 2 +3.3V_ALW R75 2 R74 2 C509 2 10 R373 50 Voltage Level shift +1.05V_VCCP For EA test use 47387-4784 1 1 1 1 1 1 ET5 ET12 ET1 ET4 ET6 ET7 H_ADSTB#0 H_A#14 H_A#16 H_ADSTB#1 H_A#21 H_A#26 H_PROCHOT# 1 AD26 C23 D25 C24 AF26 AF1 A26 GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 B22 B23 C21 BSEL[0] BSEL[1] BSEL[2] *1K/F_NC 1 *1K/F_NC 1 *0.1U_NC 1 CPU_PROCHOT# Q7 *2N7002W_NC R19 CPU_TEST2 CPU_TEST4 CPU_TEST6 *0_NC 1 ITP_TMS 1 ITP_TDO 3 R51 10M 2 3 COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# E5 B5 D24 D6 D7 AE6 COMP[0] MISC COMP[1] H_D#[0..63] 5 H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5 B Note: H_DPRTSTP need to daisy chain from ICH8 to IMVP6 to CPU. H_DPRSTP# 6,11,39 H_DPSLP# 11 H_DPWR# 5 H_PWRGOOD 11 H_CPUSLP# 5 H_PSI# 39 PAD PAD CPU_TEST3 CPU_TEST5 T145 T146 For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection. FSB BCLK 533 133 BSEL2 0 BSEL1 0 BSEL0 1 667 166 0 1 1 800 200 0 1 0 C Q6 MMST3904-7-F 1 1 H_THERM 2 R13 COMP0 COMP1 COMP2 COMP3 Q5 2N7002W 1 39/F 2 COMP[2] COMP[3] R26 U26 AA1 Y1 H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5 4 150 R18 2 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 A 2 1 H_THERMTRIP# 6,23,31,40 2 2 +1.05V_VCCP ITP_TDI AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 5 47387-4784 Populate ITP700Flex for bringup +3.3V_RUN D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# H_D#[0..63] CPU_TEST1 Place C close to the CPU_TEST4 pin. Make sure CPU_TEST4 routing is reference to GND and away from other noisy signal. R50 *2.2K_NC 3 D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#[0..63] H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 +1.05V_VCCP ITP_DBRESET# 13 N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24 Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 H_D#[0..63] 5 5 Layout Note: Place voltage divider within 0.5" of GTLREF pin ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET# R67 2 5 5 5 2 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 H CLK BCLK[0] BCLK[1] 2 0 0603 5 5 5 5 1 1 BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# R41 H_D#[0..63] D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# C68 0.1U 10 R36 54.9/F R35 27.4/F 2 M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 HIT# HITM# +1.05V_VCCP H_INIT# 11 H_LOCK# 5 D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# 2 STPCLK# LINT0 LINT1 SMI# C1 F3 F4 G3 G2 +1.05V_VCCP E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 2 For EA test use C D5 C6 B4 A3 H_STPCLK# H_INTR H_NMI H_SMI# RESET# RS[0]# RS[1]# RS[2]# TRDY# 56 2 2 11 11 11 11 A20M# FERR# IGNNE# H4 R62 H_IERR# 1 2 11 H_A20M# 11 H_FERR# 11 H_IGNNE# LOCK# THERMAL ICH A6 A5 C4 IERR# INIT# D20 B3 1 H_ADSTB#1 F1 8 U22B H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 1 5 H_DEFER# 5 H_DRDY# 5 H_DBSY# 5 H_BR0# 5 H_D#[0..63] H_D#[0..63] 2 B A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# H5 F21 E1 1 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 H_ADS# 5 H_BNR# 5 H_BPRI# 5 2 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_A#[17..35] H_A#[17..35] CONTROL REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# BR0# XDP/ITP SIGNALS K3 H2 K2 J3 L1 DEFER# DRDY# DBSY# 5 H1 E2 G5 7 DATA GRP 1 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_REQ#[0..4] ADS# BNR# BPRI# 6 DATA GRP 0 A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# ADDR GROUP 1 J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 ADDR GROUP 0 5 H_ADSTB#0 H_REQ#[0..4] 5 U22A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 A 5 5 4 DATA GRP 2 H_A#[3..16] H_A#[3..16] 3 RESERVED 5 2 DATA GRP 3 1 R38 54.9/F R42 27.4/F R3 2 +3.3V_SUS 150 1 ITP_DBRESET# Signal ITP_TCK R15 2 27/F 1 D ITP_TRST# R16 2 649/F 1 Layout Note: Place R74,R26, R19, R23, R16 , R17 close to CPU TDI Resistor Value TMS 150 ohm +/- 5% TRST# 39 ohm +/- 5% VTT Within 2.0" of the ITP TCK 680 ohm +/- 5% VTT Within 2.0" of the ITP TDO 27 ohm +/- 5% Open GND Within 2.0" of the ITP GND Within 2.0" of the ITP VTT Within 2.0" of the ITP 3 1 1 Connect To Resistor Placement ITP_EN D QUANTA COMPUTER Title Merom Processor (HOST BUS) +3VRUN 2 Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal. ITP disable guidelines R268 Depop 1 1 1 51 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com Size Document Number VM9/VM8 Date: Monday, June 23, 2008 Close to CK410M Pin8 6 7 Rev 1A Sheet 3 of 8 53 1 2 3 4 5 +VCC_CORE 6 7 +VCC_CORE U22D U22C +VCC_CORE 1 1 C52 10U 0805 4 C53 10U 0805 4 2 C43 *10U_NC 0805 4 2 1 C44 10U 0805 4 2 1 C45 10U 0805 4 2 2 1 55 8 inside cavity, north side, secondary layer. 1 1 C503 10U 0805 4 C60 10U 0805 4 2 C73 10U 0805 4 2 1 C76 10U 0805 4 2 1 C71 10U 0805 4 2 2 1 +VCC_CORE +VCC_CORE 1 1 C496 *10U_NC 0805 4 C497 *10U_NC 0805 4 2 C69 *10U_NC 0805 4 2 1 C500 *10U_NC 0805 4 2 1 C499 *10U_NC 0805 4 2 2 1 B 8 inside cavity, south side, secondary layer. 1 1 C72 10U 0805 4 C70 10U 0805 4 C495 10U 0805 4 2 C66 10U 0805 4 2 1 1 C498 10U 0805 4 2 C74 10U 0805 4 2 1 55 2 2 1 +VCC_CORE 6 inside cavity, north side, primary layer. 1 C505 10U 0805 4 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 VCCA[01] VCCA[02] B26 C26 VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] AD6 AF5 AE5 AF4 AE3 AF3 AE2 VCCSENSE AF7 VCCSENSE VSSSENSE AE7 VSSSENSE A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 +1.05V_VCCP 55 + C502 220U 7343 2.5 +1.5V_RUN VID0 VID1 VID2 VID3 VID4 VID5 VID6 39 39 39 39 39 39 39 VCCSENSE 39 C493 0.01U 25 C494 10U 0805 4 Layout Note: Place C468 near PIN B26. VSSSENSE 39 47387-4784 C75 10U 0805 4 . +VCC_CORE 1 C504 10U 0805 4 2 1 1 C506 10U 0805 4 2 C507 10U 0805 4 2 1 1 C508 10U 0805 4 2 2 C 2 1 +VCC_CORE VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16] 1 C46 10U 0805 4 2 C47 10U 0805 4 AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 1 1 1 C48 10U 0805 4 2 C49 10U 0805 4 2 1 1 C50 *10U_NC 0805 4 2 A 2 2 1 55 VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100] 2 All use 10U 4V(+-20%,X6S,0805)Pb-Free. VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067] 1 A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 2 +VCC_CORE 6 inside cavity, south side, primary layer. 2 R32 100/F VCCSENSE VSSSENSE 1 +PWR_SRC +1.05V_VCCP 10 10 10 10 C64 0.1U 10 + C523 100U 25 + C519 *100U_NC 25 + C518 *100U_NC 25 P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] A B C 47387-4784 R33 100/F 10 Layout out: Place these inside socket cavity on North side secondary. VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] . 2 1 C58 0.1U 2 1 C65 0.1U 2 1 C54 0.1U 2 1 C56 0.1U 2 1 C55 0.1U 2 2 1 63 8 Layout Note: Need to add 100uF cap on PWR_SRC for cap singing. Place on PWR_SRC near +VCC_CORE. Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU. D D QUANTA COMPUTER Title Merom Processor (POWER) 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 4 of 8 53 5 6 H_A#[3..35] B6 E5 H_CPURST# H_CPUSLP# 1 2 2 1 2 2 2 +1.05V_VCCP R139 54.9/F 1 1 R141 54.9/F H_SCOMP H_SCOMP# 2 H_RCOMP 1 R91 24.9/F C Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil spacing. 3 3 H_RESET# H_CPUSLP# B9 A9 +1.05V_VCCP C131 *0.1U_NC 10 C113 *0.1U_NC 10 C145 *0.1U_NC 10 C142 *0.1U_NC 10 B H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3 H_BNR# 3 H_BPRI# 3 H_BR0# 3 H_DEFER# 3 H_DBSY# 3 CLK_MCH_BCLK 17 CLK_MCH_BCLK# 17 H_DPWR# 3 H_DRDY# 3 H_HIT# 3 H_HITM# 3 H_LOCK# 3 H_TRDY# 3 +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP C141 *0.1U_NC 10 C165 *0.1U_NC 10 C159 *0.1U_NC 10 Layout Note: C131 should be near AB1,AB2,AC2,Y3 C90 should be near AD2,AE2,AG3,AE3 H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 K5 L2 AD13 AE13 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 M7 K3 AD2 AH11 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 3 3 3 3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 L7 K2 AC2 AJ10 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 3 3 3 3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 M14 E13 A11 H13 B12 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 3 3 3 3 3 H_RS#_0 H_RS#_1 H_RS#_2 E12 D7 D8 H_RS#0 H_RS#1 H_RS#2 3 3 3 3 3 3 3 C127 should be near E2,F3,H2,H3,G4,H5,G7,H7 C129 should be near M6,L7,K9,M7,N8,N9,M10,M11,N12,P13 C149 should be near H13,J13,L13,M14,L16,K16,J17,H17 C C146 should be near E13,G17,F16,C15,B14,C11,B11,A11,B12 H_AVREF H_DVREF C121 0.1U LE82GM965-SLA5T-MM#891181 2 2 R96 2K/F 1 1 H_REF G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7 +1.05V_VCCP C113 should be near AC5,AC6,AD7,AC7,AC9,AD9,AD11,AC11,AD12,AD13,AC14 1 R94 1K/F H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# +1.05V_VCCP 2 H_SCOMP H_SCOMP# 10 B +1.05V_VCCP 1 W1 W2 C107 0.1U A 2 2 H_SCOMP H_SCOMP# 1 R92 100/F 3 1 H_SWING H_RCOMP H_SWING H_A#[3..35] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 2 B3 C2 R93 221/F J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19 1 H_SWING H_RCOMP +1.05V_VCCP H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 2 +1.05V_VCCP A H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 1 E2 G2 G7 M6 H7 H3 G4 F3 N8 H2 M10 N12 N9 H5 P13 K9 M2 W10 Y8 V4 M3 J1 N5 N3 W6 W9 N2 Y7 Y9 P4 W3 N1 AD12 AE3 AD9 AC9 AC7 AC14 AD11 AC11 AB2 AD7 AB1 Y3 AC6 AE2 AC5 AG3 AJ9 AH8 AJ14 AE9 AE11 AH12 AJ5 AH5 AJ6 AE7 AJ7 AJ2 AE5 AJ3 AH2 AH13 2 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 HOST H_D#[0..63] H_D#[0..63] 8 1 U20A 3 7 2 4 1 3 2 2 1 1 10 Layout Note: Place the 0.1 uF decoupling capacitor within 100 mils from GMCH pins. D 1 2 3 For EA test use ET10 ET2 ET14 ET9 ET8 ET13 ET3 ET18 4 1 1 1 1 1 1 1 1 76 D H_DSTBP#0 H_D#7 H_D#12 H_DSTBN#1 H_DSTBP#1 H_D#29 H_D#21 H_D#32 QUANTA COMPUTER Title Crestline (HOST) 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Monday, June 02, 2008 7 Rev 1A Sheet 5 of 8 53 2 3 4 5 6 DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS2_DIMMB# DDR_CS3_DIMMB# 7,15,16 15,16 15,16 7,15,16 SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3 BH18 BJ15 BJ14 BE16 M_ODT0 M_ODT1 M_ODT2 M_ODT3 SM_RCOMP SM_RCOMP# BL15 BK14 SMRCOMPP SMRCOMPN SM_RCOMP_VOH SM_RCOMP_VOL BK31 BL31 SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF_0 SM_VREF_1 AR49 AW4 ME B42 C42 H48 H47 PEG_CLK PEG_CLK# K44 K45 SMRCOMPP SMRCOMPN 1 R149 2 100 2 1 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 PAD PAD PAD T14 T4 T6 G44 B47 B45 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 PAD PAD PAD T9 T5 T7 E44 A47 A45 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 E27 G27 K27 TVA_DAC TVB_DAC TVC_DAC F27 J27 L27 TVA_RTN TVB_RTN TVC_RTN M35 P33 TV_DCONSEL_0 TV_DCONSEL_1 H32 G32 K29 J29 F29 E29 CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED# K33 G35 F33 C32 E33 CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC 7 +1.25V_RUN Non-iAMT CLK_MCH_3GPLL 17 CLK_MCH_3GPLL# 17 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 AN47 AJ38 AN42 AN46 DMI_MRX_ITX_N0 DMI_MRX_ITX_N1 DMI_MRX_ITX_N2 DMI_MRX_ITX_N3 12 12 12 12 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 AM47 AJ39 AN41 AN45 DMI_MRX_ITX_P0 DMI_MRX_ITX_P1 DMI_MRX_ITX_P2 DMI_MRX_ITX_P3 12 12 12 12 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 AJ46 AJ41 AM40 AM44 DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3 12 12 12 12 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 AJ47 AJ42 AM39 AM43 DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3 12 12 12 12 R6 R8 R14 R166 1K/F MCH_CLVREF GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VR_EN T10 T144 T143 T142 T141 C214 0.1U R165 392/F 10 19 VGA_BLU 19 VGA_GRN 19 VGA_RED 19 G_CLK_DDC2 19 G_DAT_DDC2 19 VGAHSYNC AM49 AK50 AT43 AN49 AM50 VGAVSYNC R43 R119 150/F CL_CLK0 13 CL_DATA0 13 ICH_CL_PWROK 13,23 ICH_CL_RST0# 13 MCH_CLVREF CFG5 PLTRST#_R 3 CFG16 CFG19 CFG20 2 R134 20K 2 TEST_1 TEST_2 A37 R32 PAD T17 PAD T28 CLK_3GPLLREQ# 17 MCH_ICH_SYNC# 13 SJ5 VGA_RED 2 30/F 2 1.3K/F 2 30/F PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39 AC46 AC49 AC42 AH39 AE49 AH44 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15 M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38 AD47 AC50 AD43 AG39 AE50 AH43 A B C *0_NC THERMTRIP_MCH# +3.3V_RUN UMA R103 150/F UMA R102 R105 LCD_DDCCLK LCD_DDCDAT Layout Note: Place 150 ohm termination resistors close to GMCH. Low=DMIx2 DMI X2 Select High=DMIx4(Default) PCI Express Low= Reveise Lane Graphic Lane High=Normal operation FSB Dynamic Low=Dynamic ODT Disable ODT High=Dynamic ODT Enable(default). DMI Lane Low=Normal(default). Reversal High=Lane Reversed Low=Only SDVO or PCIEx1 is SDVO/PCIE operational (defaults) Concurrent High=SDVO and PCIEx1 are operating Operation simultaneously via PEG port Low=No SDVO Device Present (default) SDVO_CRTL_DATA SDVO Present. High=SDVO Device Present 4 1 2.2K 1 2.2K 2 2 D QUANTA COMPUTER Title 1 H35 K36 G39 G40 VGA_GRN R104 1 R362 1 R99 1 VGA_BLU VGA_GRN VGA_RED CFG9 SDVO_CTRL_CLK SDVO_CTRL_DATA CLK_REQ# ICH_SYNC# VGA_BLU J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41 24.9/F 2 LE82GM965-SLA5T-MM#891181 PAD PAD PAD PAD PAD R116 150/F CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF 75/F 75/F 75/F 21 3,23,31,40 H_THERMTRIP# E35 A39 C38 B39 E36 LE82GM965-SLA5T-MM#891181 *0_NC G50 E50 F48 R177 20/F MCH_DREFCLK 17 MCH_DREFCLK# 17 DREF_SSCLK 17 DREF_SSCLK# 17 2 12,23,26,34 PLTRST# R148 18 LCD_A0+ 18 LCD_A1+ 18 LCD_A2+ 2 R180 20/F V_DDR_MCH_REF 1 12 SB_NB_PCIE_RST# LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 2 DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# 15,16 15,16 15,16 15,16 1 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 MISC D G51 E51 F49 1 +1.8V_SUS T19 T11 1 DMI PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR NC BJ51 BK51 BK50 BL50 BL49 BL3 BL2 BK1 BJ1 E1 A5 C51 B50 A50 A49 BK2 18 LCD_A018 LCD_A118 LCD_A2- PAD PAD 1 G41 L39 PM_EXTTS#0 L36 PM_EXTTS#1 J36 AW49 PLTRST#_R AV20 THERMTRIP_MCH# N20 G36 BG20 BK16 BG16 BE13 T21 18 LCD_ACLK18 LCD_ACLK+ UMA 19 GRAPHICS VID 1 1 LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK PAD R126 N43 VCC3G_PCIE_R 1 M43 PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 VGA 13,39 DPRSLPVR 1 PM 13 PM_BMBUSY# 3,11,39 H_DPRSTP# 15 PM_EXTTS#0 15 PM_EXTTS#1 13,35 ICH_PWRGD 1 CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20 CFG C 1 CFG3 CFG4 *4.02K/F_NCCFG5 CFG6 CFG7 CFG8 *4.02K/F_NCCFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 *4.02K/F_NCCFG16 CFG17 CFG18 *4.02K/F_NCCFG19 *4.02K/F_NCCFG20 P27 N27 N24 C21 C23 F23 N23 G23 J20 C20 R24 L23 J23 E23 E20 K23 M20 M24 L32 N33 L35 SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3 2 Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub. 3,17 CPU_MCH_BSEL0 3,17 CPU_MCH_BSEL1 3,17 CPU_MCH_BSEL2 PAD T15 PAD T140 R117 2 PAD T29 PAD T16 PAD T22 R100 2 PAD T30 PAD T26 PAD T23 PAD T12 PAD T13 PAD T24 R129 2 +3.3V_RUN PAD T27 PAD T25 PADT25 R127 2 R120 2 15,16 15,16 15,16 15,16 2 THERMTRIP_MCH# DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE3_DIMMB DDR_CKE4_DIMMB 1 R132 1 BE29 AY32 BD39 BG37 L_IBG TV 56 2 L41 L43 N41 N40 D46 C45 D44 E42 18 LCD_DDCCLK 18 LCD_DDCDAT 18 ENVDD R123 2.4K/F 1 +1.05V_VCCP SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4 15 15 15 15 PEG_COMPI PEG_COMPO 2 B M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#3 M_CLK_DDR#4 LCD_DDCCLK LCD_DDCDAT 2 PM_EXTTS#0 PM_EXTTS#1 2 10K 2 10K AW30 BA23 AW25 AW23 L_IBG 1 R125 1 R121 1 SM_CK#_0 SM_CK#_1 SM_CK#_3 SM_CK#_4 15 15 15 15 2 +3.3V_RUN M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR3 M_CLK_DDR4 1 15,16 DDR_A_MA14 15,16 DDR_B_MA14 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45 CLK Santa Rosa Platform MOW WW15 For 4Gb DRAM support, change Pin-BJ29 to DDR_A_MA14, change Pin-BE24 to DDR_B_MA14. H10 B51 BJ20 BK22 BF19 BH20 BK18 BJ18 BF23 BG23 BC23 BD24 BJ29 BE24 BH39 AW20 BK20 C48 D47 B44 C44 A35 B37 B36 B34 C34 RSVD 1 R175 1K/F AV29 BB23 BA25 AV23 1 2 1 2 2 25 C237 2.2U 0805 10 8 +VCC_PEG LVDS 1 SM_RCOMP_VOL C241 0.01U SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4 2 R178 3.01K/F L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN 1 C232 2.2U 0805 10 J40 H39 E39 E40 C37 D35 K40 18 BIA_PWM 23 PANEL_BKEN 2 25 1 1 C238 0.01U 2 2 A 2 1 SM_RCOMP_VOH RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 MUXING 1 R179 1K/F P36 P37 R35 N35 AR12 AR13 AM12 AN13 J12 AR37 AM36 AL36 AM37 D20 DDR 2 +1.8V_SUS 7 U20C GRAPHICS U20B PCI-EXPRESS 1 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Crestline (VGA,DMI) Size Document Number VM9/VM8 Date: Thursday, June 12, 2008 7 Rev 1A Sheet 6 of 8 53 C 6 15 DDR_B_D[0..63] SA_BS_0 SA_BS_1 SA_BS_2 BB19 BK19 BF29 DDR_A_BS0 DDR_A_BS1 DDR_A_BS2 SA_CAS# BL17 DDR_A_CAS# SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 AT45 BD44 BD42 AW38 AW13 BG8 AY5 AN6 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 SA_RAS# SA_RCVEN# BE18 AY20 DDR_A_RAS# SA_WE# BA19 DDR_A_CAS# 15,16 DDR_A_DM[0..7] 15 DDR_A_DQS#[0..7] DDR_A_MA[0..13] T38 DDR_A_WE# 15 15 15,16 DDR_A_RAS# 15,16 PAD DDR_A_WE# 15,16 AP49 AR51 AW50 AW51 AN51 AN50 AV50 AV49 BA50 BB50 BA49 BE50 BA51 AY49 BF50 BF49 BJ50 BJ44 BJ43 BL43 BK47 BK49 BK43 BK42 BJ41 BL41 BJ37 BJ36 BK41 BJ40 BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12 BJ10 BL9 BK5 BL5 BK9 BK10 BJ8 BJ6 BF4 BH5 BG1 BC2 BK3 BE4 BD3 BJ2 BA3 BB3 AR1 AT3 AY2 AY3 AU2 AT2 LE82GM965-SLA5T-MM#891181 1 1 1 1 1 1 1 1 1 1 1 DDR_A_CAS# DDR_A_RAS# DDR_A_WE# DDR_CS0_DIMMA# DDR_A_MA9 DDR_A_MA13 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_D63 DDR_A_D55 DDR_A_D22 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_BS_0 SB_BS_1 SB_BS_2 AY17 BG18 BG36 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 SB_CAS# BE17 DDR_B_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 SB_RAS# SB_RCVEN# AV16 AY18 DDR_B_RAS# SB_WE# BC17 DDR_B_WE# SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 DDR_B_BS0 15,16 DDR_B_BS1 15,16 DDR_B_BS2 15,16 A DDR_B_CAS# 15,16 DDR_B_DM[0..7] 15 DDR_B_DQS[0..7] 15 DDR_B_DQS#[0..7] DDR_B_MA[0..13] T39 15 B 15,16 DDR_B_RAS# 15,16 PAD DDR_B_WE# 15,16 C LE82GM965-SLA5T-MM#891181 76 For EA test use ET42 ET37 ET31 ET39 ET32 ET44 ET28 ET27 ET23 ET26 ET40 8 U20E DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_A_BS0 15,16 DDR_A_BS1 15,16 DDR_A_BS2 15,16 DDR_A_DQS[0..7] 7 B A MEMORY SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SYSTEM AR43 AW44 BA45 AY46 AR41 AR45 AT42 AW47 BB45 BF48 BG47 BJ45 BB47 BG50 BH49 BE45 AW43 BE44 BG42 BE40 BF44 BH45 BG40 BF40 AR40 AW40 AT39 AW36 AW41 AY41 AV38 AT38 AV13 AT13 AW11 AV11 AU15 AT11 BA13 BA11 BE10 BD10 BD8 AY9 BG10 AW9 BD7 BB9 BB5 AY7 AT5 AT7 AY6 BB7 AR5 AR8 AR9 AN3 AM8 AN10 AT9 AN9 AM9 AN11 DDR B 5 U20D DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 A 4 MEMORY 15 DDR_A_D[0..63] 3 SYSTEM 2 DDR 1 76 For EA test use ET36 ET29 ET33 ET38 ET35 ET41 ET24 ET25 ET30 ET34 ET43 DDR_CS0_DIMMA# 6,15,16 1 1 1 1 1 1 1 1 1 1 1 DDR_B_CAS# DDR_B_RAS# DDR_B_WE# DDR_CS3_DIMMB# DDR_B_MA11 DDR_B_MA1 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_D6 DDR_B_D8 DDR_B_D41 DDR_CS3_DIMMB# 6,15,16 D D QUANTA COMPUTER Title Crestline (DDR2) 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 7 of 8 53 5 4 3 2 1 +3.3V_RUN A + C477 *220U_NC 7343 6.3 55 1 C150 22U 0805 4 Layout Note: Inside GMCH cavity. 1 2 C458 22U 0805 4 1 C179 0.1U 10 1 10 Non-iAMT C177 0.1U 2 1 C178 0.1U AL24 AL26 AL28 AM26 AM28 AM29 AM31 AM32 AM33 AP29 AP31 AP32 AP33 AL29 AL31 AL32 AR31 AR32 AR33 10 1 2 1 +1.05V_VCCP C188 0.22U 0603 10 C187 0.22U 0603 10 2 C158 10U 0603 6.3 2 1 C182 1U 0603 10 2 1 C161 0.47U 0603 10 2 10 2 1 C170 0.1U +1.05V_VCCP 2 10 2 1 C167 0.1U 2 1 Layout Note: Inside GMCH cavity for VCC_AXG. Layout Note: Place close to GMCH edge. VSS NCTF D VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6 A3 B2 C1 BL1 BL51 A51 VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7 AT33 AT31 AK29 AK24 AK23 AJ26 AJ23 C +1.05V_VCCP VCC_AXM_NCTF_1 VCC_AXM_NCTF_2 VCC_AXM_NCTF_3 VCC_AXM_NCTF_4 VCC_AXM_NCTF_5 VCC_AXM_NCTF_6 VCC_AXM_NCTF_7 VCC_AXM_NCTF_8 VCC_AXM_NCTF_9 VCC_AXM_NCTF_10 VCC_AXM_NCTF_11 VCC_AXM_NCTF_12 VCC_AXM_NCTF_13 VCC_AXM_NCTF_14 VCC_AXM_NCTF_15 VCC_AXM_NCTF_16 VCC_AXM_NCTF_17 VCC_AXM_NCTF_18 VCC_AXM_NCTF_19 B LE82GM965-SLA5T-MM#891181 +1.8V_SUS 55 VCC_SM 10 1 C215 1U 0603 10 2 1 C216 0.47U 0603 10 2 1 C218 0.22U 0603 10 2 1 C219 0.22U 0603 10 C202 1U 0603 10 2 C451 220U 7343 2.5 Layout Note: Place C195 where LVDS and DDR2 taps. 1 + C204 0.1U 10 C235 22U 0805 4 2 1 1 10 C191 0.1U 2 C192 0.1U 1 2 1 VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7 AW45 BC39 BE39 BD17 BD4 AW8 AT6 T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28 POWER VSS SCB 1 C136 *220U_NC 7343 6.3 2 1 + C114 *220U_NC 7343 2.5 2 + C124 *220U_NC 7343 2.5 2 2 + +1.05V_VCCP 1 1 Layout Note: 370 mils from edge. VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VCC AXM 10 VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8 VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44 VCC_NCTF_45 VCC_NCTF_46 VCC_NCTF_47 VCC_NCTF_48 VCC_NCTF_49 VCC_NCTF_50 VCC NCTF C168 0.1U AB33 AB36 AB37 AC33 AC35 AC36 AD35 AD36 AF33 AF36 AH33 AH35 AH36 AH37 AJ33 AJ35 AK33 AK35 AK36 AK37 AD33 AJ36 AM35 AL33 AL35 AA33 AA35 AA36 AP35 AP36 AR35 AR36 Y32 Y33 Y35 Y36 Y37 T30 T34 T35 U29 U31 U32 U33 U35 U36 V32 V33 V36 V37 VCC AXM NCTF 1 C181 0.22U 0603 10 2 1 C155 0.22U 0603 10 2 C151 22U 0805 4 2 2 1 1 1 2 C468 220U 7343 2.5 Layout Note: Inside GMCH cavity. 2 VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7 + Layout Note: 370 mils from edge. 1 VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 2 65 2 B R20 T14 W13 W14 Y12 AA20 AA23 AA26 AA28 AB21 AB24 AB29 AC20 AC21 AC23 AC24 AC26 AC28 AC29 AD20 AD23 AD24 AD28 AF21 AF26 AA31 AH20 AH21 AH23 AH24 AH26 AD31 AJ20 AN14 VCC GFX +1.05V_VCCP D8 1 +VCC_GMCH_L +1.05V_VCCP 2 C VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 10 2 SDMK0340L-7-F 1 AU32 AU33 AU35 AV33 AW33 AW35 AY35 BA32 BA33 BA35 BB33 BC32 BC33 BC35 BD32 BD35 BE32 BE33 BE35 BF33 BF34 BG32 BG33 BG35 BH32 BH34 BH35 BJ32 BJ33 BJ34 BK32 BK33 BK34 BK35 BL33 AU30 VCC GFX NCTF POWER +1.8V_SUS T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31 2 VCC_13 VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8 VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83 VCC SM LF R30 U20F R86 1 VCC CORE VCC_1 VCC_2 VCC_3 VCC_5 VCC_4 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC SM D U20G AT35 AT34 AH28 AC32 AC31 AK32 AJ31 AJ28 AH32 AH31 AH29 AF32 2 +1.05V_VCCP C224 22U 0805 4 Layout Note: Place on the edge. A LE82GM965-SLA5T-MM#891181 Title QUANTA COMPUTER Crestline (VCC,NCTF) 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 Rev 1A Sheet 1 8 of 53 5 4 3 2 1 +3.3V_RUN U20H +VCCA_PEG_PLL AXF 2 1 1 1 2 2 1 2 2 1 VTTLF1 VTTLF2 VTTLF3 A7 F2 AH1 2 1 2 1 2 +VCC_PEG 1 C460 220U 7343 2.5 +VTTLF1 +VTTLF2 +VTTLF3 2 0 1206 For EMI fine tune. + C146 10U 0603 6.3 +1.05V_VCCP R348 1 55 C455 *220U_NC 7343 4 B 2 0 1206 For EMI fine tune. + C109 0.47U 0603 10 C456 10U 0603 6.3 +1.8V_SUS C108 0.47U 0603 10 +VCC_SM_CK 1 R184 1 C221 0.1U 10 2 +VCCD_TVDAC_R C245 22U 1206 10 3 +VCCQ_TVDAC_R R183 1/F 0603 +VCC_SM_CK_L 2 0 1206 For EMI fine tune. C246 10U 0603 6.3 C463 *22nF_NC A 0 2 3 C484 *22nF_NC +VCC_TVDACC_R R352 1 100 2 +VCCQ_TVDAC C462 1U 0603 10 R351 1 1 0 2 3 2 1 C464 *22nF_NC Title TV DAC Voltage Follower Circuit -700 mV. 5 +1.05V_VCCP R349 1 +VCC_RXR_DMI 0 2 1 For EMI fine tune. C476 + *220U_NC 7343 4 65 2 1 C465 0.1U 10 2 0 1206 1 1 C166 0.47U 0603 10 1 2 *SDMK0340L-7-F_NC SM CK 1 C478 *22nF_NC 1 C485 0.1U 10 VCC_RXR_DMI_1 VCC_RXR_DMI_2 AH50 AH51 50 C106 0.1U 10 +1.5V_RUN 1 R49 *10_NC 2 AD51 W50 W51 V49 V50 +VCC_TVDACB_R 2 +VCC_TVDAC_L 1 VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5 C105 1000P C +1.8V_SUS 1 +VCC_TVDACA_R 3 2 1 1 D7 2 +3.3V_RUN C130 LE82GM965-SLA5T-MM#891181 *10U_NC 0603 6.3 +VTTLF1 +VTTLF2 +VTTLF3 2 2 2 R368 C40 B40 C111 10U 0603 6.3 Place caps close to VCC_AXF R87 2 C127 1U 0603 10 R350 +VCC_TVDACC 2 +3.3V_RUN VCC_HV_1 VCC_HV_2 C117 1U 0603 10 55 1 1 2 VCCD_LVDS_1 VCCD_LVDS_2 A +1.5V_RUN +VCC_TX_LVDS 1 2 VCCD_PEG_PLL J41 H42 VCC_TX_LVDS A43 +1.25V_RUN C230 0.1U 10 2 U48 +VCCD_LVDS +VCC_SM_CK 1 +VCCA_PEG_PLL VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4 BK24 BK23 BJ24 BJ23 2 VCCD_HPLL AJ50 2 VCCD_QDAC VCC_DMI 0 1 C480 0.1U 10 close to VCC_AXD. +1.25V_RUN 1 VCCD_CRT VCCD_TVDAC VCC_AXF_1 VCC_AXF_2 VCC_AXF_3 B23 B21 A21 2 VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2 N28 2 1 1 M32 L29 VCCA_SM_CK_1 VCCA_SM_CK_2 C474 *22nF_NC 1 1 C81 0.1U 10 C25 B25 C27 B27 B28 A28 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2 AN2 3 R358 +VCC_TVDACB 2 C483 *22nF_NC 2 1 R69 0.033/F 2 1 2010 1 +VCC_TVBG 2 1 C475 0.1U 10 Reserved L81 pad for C242 inductor. 22U 1206 10 Place caps 1 +VCC_TVDACC_R 0 1 2 7 R370 0 C101 10U 0603 6.3 2 1 2 22nF & 0.1uF for VCC_TVDACA:C_R should be placed with in 250 mils from Crestline. +VCC_TVDACA +VCC_AXD_R C201 1U 0603 10 1 +VCC_TVDACB_R 10 +VCCQ_TVDAC_R +1.8V_SUS C148 0.1U 10 R360 L10 BLM18PG181SN1D 0603 +1.25V_RUN 1 Non-iAMT 2 1 2 C176 0.1U 10 +3.3V_RUN +1.25V_RUN +VCC_AXD_L 2 C222 0.1U C147 0.1U 10 AR29 VTTLF +VCC_TVDACA_R POWER 2 1 2 C140 10U 0603 6.3 VCC_AXD_NCTF 2 1 1 2 2 +1.25V_RUN AT23 AU28 AU24 AT29 AT25 AT30 HV BC29 BB29 +VCCD_TVDAC_R R131 1/F 0603 6.3 NoniAMT + C461 220U 7343 2.5 Place on the edge. VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6 PEG C180 1U 0603 10 VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 DMI 1 C209 1U 0603 10 2 1 C206 1U 0603 10 2 1 2 1 2 C220 22U 0805 4 FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC 2 VCCA_PEG_PLL 1 1 C211 22U 0805 4 2 1 1 C212 22U 0805 4 2 1 C189 4.7U 0603 6.3 2 2 1 + C454 *100U_NC 7343 6.3 BLM21P221SGPT +VCCA_PEG_PLL 0805 3 U51 AT22 AT21 AT19 AT18 AT17 AR17 AR16 +VCCA_SM_CK +1.25V_RUN 1 VSSA_PEG_BG AW18 AV19 AU19 AU18 AU17 +1.25V_RUN 2 K49 A SM 10 +VCCA_SM 2 Non-iAMT +VCC_TVBG_R VCCA_PEG_BG D 1 C132 0.1U 10 +1.25V_RUN +3.3V_RUN K50 C157 4.7U 0603 6.3 2 2 C466 0.1U 55 B VSSA_LVDS C138 0.47U 1 1 + C467 220U 7343 2.5 C185 0.1U FB_220ohm+-25%_100MHz _2A_0.1ohm DC VCCA_LVDS B41 A CK 2 1 2 1 2 0.1Caps should be placed 200 mils with in its pins. 10 L14 A41 A PEG +VCCA_DPLLB +VCCA_MPLL VCCA_MPLL 10 1 1 0805 C457 22U 1206 10 +VCC_TX_LVDS +3.3V_RUN 1 BLM11A05S 0603 R147 0.5/F 1 2 0603 +VCCA_MPLL_L C471 0.1U L31 10uH 2 L16 + C469 220U 7343 2.5 50 1 AM2 R89 *10_NC 2 2 10 2 1 1 2 55 65 C173 0.1U C99 1000P 2 1 +VCCA_HPLL 0603 C459 22U 1206 10 +VCCA_MPLL +VCCA_DPLLA 2 BLM11A05S 1 AXD 10uH+-20%_100mA L32 10uH 2 0805 +VCC_HV_L 65 1 VCCA_HPLL 2 VCCA_DPLLB AL2 D9 *SDMK0340L-7-F_NC Place on the edge. 1 H49 +VCCA_HPLL C134 4.7U 0603 6.3 2 +VCCA_DPLLB TV +1.25V_RUN 1 FB_120ohm+-25%_100mHz _200mA_0.2ohm DC +1.25V_RUN L15 40mA MAx. 45mA MAx. Non-iAMT 1 VCCA_DPLLA 2 B49 +1.05V_VCCP VCC_HV +1.05V_VCCP 1 +VCCA_DPLLA C137 2.2U 0603 6.3 2 VSSA_DAC_BG U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1 1 VCCA_DAC_BG B32 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 2 A30 +VCC_TVBG_R A LVDS 2 2 C473 *22nF_NC 10 VTT VCCA_CRT_DAC_1 VCCA_CRT_DAC_2 D TV/CRT 2 C482 0.1U C133 0.1U 10 PLL A33 B33 +VCCA_CRTDAC_R 1 LVDS 3 D C +VCCA_CRTDAC_R 2 1 1 1 +3.3V_RUN +1.05V_VCCP VCCSYNC R361 0 2 L33 BLM18PG181SN1D +VCCA_CRTDAC 0603 J32 CRT FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC QUANTA COMPUTER Crestline (POWER) 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Monday, June 02, 2008 Rev 1A Sheet 1 9 of 53 5 4 3 2 U20I A13 A15 A17 A24 AA21 AA24 AA29 AB20 AB23 AB26 AB28 AB31 AC10 AC13 AC3 AC39 AC43 AC47 AD1 AD21 AD26 AD29 AD3 AD41 AD45 AD49 AD5 AD50 AD8 AE10 AE14 AE6 AF20 AF23 AF24 AF31 AG2 AG38 AG43 AG47 AG50 AH3 AH40 AH41 AH7 AH9 AJ11 AJ13 AJ21 AJ24 AJ29 AJ32 AJ43 AJ45 AJ49 AK20 AK21 AK26 AK28 AK31 AK51 AL1 AM11 AM13 AM3 AM4 AM41 AM45 AN1 AN38 AN39 AN43 AN5 AN7 AP4 AP48 AP50 AR11 AR2 AR39 AR44 AR47 AR7 AT10 AT14 AT41 AT49 AU1 AU23 AU29 AU3 AU36 AU49 AU51 AV39 AV48 AW1 AW12 AW16 D C B A VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 1 U20J VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41 C46 C50 C7 D13 D24 D3 D32 D39 D45 D49 E10 E16 E24 E28 E32 E47 F19 F36 F4 F40 F50 G1 G13 G16 G19 G24 G28 G29 G33 G42 G45 G48 G8 H24 H28 H4 H45 J11 J16 J2 J24 J28 J33 J35 J39 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 K12 K47 K8 L1 L17 L20 L24 L28 L3 L33 L49 M28 M42 M46 M49 M5 M50 M9 N11 N14 N17 N29 N32 N36 N39 N44 N49 N7 P19 P2 P23 P3 P50 R49 T39 T43 T47 U41 U45 U50 V2 V3 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29 T29 T31 T33 R28 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50 D C VSS B LE82GM965-SLA5T-MM#891181 A LE82GM965-SLA5T-MM#891181 Title QUANTA COMPUTER Crestline (VSS) 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 Rev 1A Sheet 1 10 of 53 1 2 3 4 5 6 7 8 +1.05V_VCCP +RTC_CELL +RTC_CELL RTCRST# R325 1 +3.3V_SUS 32 ICH_AZ_CODEC_SYNC R329 1 2 33 ACZ_SYNC 23,32 ICH_AZ_CODEC_RST# R199 1 2 33 ACZ_RST# R200 1 2 33 ACZ_SDOUT *10K_NC 2 R272 24.9/F 1 2 GLAN_COMP ACZ_BIT_CLK ACZ_SYNC 32 ICH_AZ_CODEC_SDIN0 T127 PAD T124 PAD T56 PAD ACZ_SDOUT R209 2 R331 2 +3.3V_SUS 28 28 SATA_TX1SATA_TX1+ C433 C432 C429 C430 2 2 2 2 1 3900P 1 3900P 1 3900P 1 3900P 25 25 25 25 SATA_TX0-_C SATA_TX0+_C C21 B21 C22 LAN_RXD0 LAN_RXD1 LAN_RXD2 D21 E20 C20 LAN_TXD0 LAN_TXD1 LAN_TXD2 D25 C25 AJ16 AJ15 GLAN_DOCK#/GPIO13 AE14 HDA_RST# AJ17 AH17 AH15 AD13 HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 AE13 HDA_SDOUT SATALED# SATA_TX0-_C SATA_TX0+_C AF6 AF5 AH5 AH6 SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA_TX1-_C SATA_TX1+_C AG3 AG4 AJ4 AJ3 SATA1RXN SATA1RXP SATA1TXN SATA1TXP PAD PAD AF2 AF1 AE4 AE3 SATA2RXN SATA2RXP SATA2TXN SATA2TXP AB7 AC6 SATA_CLKN SATA_CLKP R321 24.9/F 1 2 AG1 AG2 SATARBIAS# SATARBIAS 17 CLK_PCIE_SATA# 17 CLK_PCIE_SATA Place within 500mils of ICH8 ball SATABIAS LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 SIO_A20GATE DPRSTP# DPSLP# AF26 AE26 H_DPRSTP# H_DPSLP# FERR# AD24 H_FERR# CPUPWRGD/GPIO49 AG29 IGNNE# AF27 INIT# INTR RCIN# AE24 AC20 AH14 NMI SMI# AD23 AG28 2 1 SIO_A20GATE 23 H_A20M# 3 H_DPRSTP# 3,6,39 H_DPSLP# 3 H_PWRGOOD 3 H_IGNNE# 3 H_INIT# 3 H_INTR 3 SIO_RCIN# 23 SIO_RCIN# H_NMI H_SMI# STPCLK# THRMTRIP# AE27 THERMTRIP#_ICH TP8 3 3 H_STPCLK# 3 AA23 PAD T65 DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 V1 U2 V3 T1 V4 T5 AB2 T6 T3 R2 T4 V6 V5 U1 V2 U6 PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD T115 T111 T113 T109 T110 T71 T121 T70 T107 T105 T72 T64 T62 T112 T114 T68 DA0 DA1 DA2 AA4 AA1 AB3 PAD PAD PAD T58 T120 T119 Y6 Y5 PAD PAD T67 T60 W4 W3 Y2 Y3 Y1 W5 B H_FERR# 3 AA24 DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ SIO_A20GATE SIO_RCIN# R338 10K T85 T88 AF13 AG26 DCS1# DCS3# 23,26 23,26 23,26 23,26 LPC_LFRAME# 23,26 PAD PAD A20GATE A20M# HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 28 SATA_RX028 SATA_RX0+ T51 T50 G9 E6 HDA_BIT_CLK HDA_SYNC 30 SATA_ACT# SATA_TX1-_C SATA_TX1+_C LDRQ0# LDRQ1#/GPIO23 GLAN_COMPI GLAN_COMPO AF10 28 SATA_RX128 SATA_RX1+ Distance between the ICH-8 M and cap on the "P" signal should be identical distance between the ICH-8 M and cap on the "N" signal for same pair. LAN_RSTSYNC 1 *10K_NC AE10 1 *10K_NC AG14 C SATA_TX0SATA_TX0+ GLAN_CLK AH21 ACZ_RST# Place all series terms close to ICH8 except for SDIN input lines,which should be close to source. B24 D22 FWH4/LFRAME# C4 CPU C445 27P 50 LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 PAD PAD PAD PAD PAD PAD INTVRMEN LAN100_SLP E5 F5 G8 F6 IDE 2 2 1 T92 T82 T94 GLAN_CLK PAD INTRUDER# FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 1 AF23 LAN / GLAN T99 ACZ_BIT_CLK +1.5V_PCIE_ICH 28 28 2 2 ICH_RTCRST# RTC LPC RTCX1 RTCX2 ICH_INTVRMEN AF25 ICH_LAN100_SLP AD21 L37 22uH 0402 1 AG25 AF24 ICH_INTRUDER# AD22 Reserved for Intel NinevehT100 T101 design. T93 32 ICH_AZ_CODEC_SDOUT R337 10K ICH_RTCX1 ICH_RTCX2 IHDA 1 1 2 C266 1U 0603 10 38 B +3.3V_RUN Low = Internal VR Disabled High = Internal VR Enabled(Default) U19A ICH_RTCRST# ICH_INTRUDER# 2 33 ICH_LAN100_SLP R224 56 A ICH8M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05) Low = Internal VR Disabled High = Internal VR Enabled(Default) R202 20K R328 1 R223 56 2 2 1 2 ICH_INTVRMEN H_DPRSTP# H_DPSLP# H_FERR# THERMTRIP#_ICH R210 *0_NC ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) R225 1M ICH_LAN100_SLP R218 *56_NC 1 1 50 +RTC_CELL 32 ICH_AZ_CODEC_BITCLK ICH_INTVRMEN R236 *0_NC SATA 2 50 C439 12P R222 *56_NC 1 3 32.768KHZ 2 1 C440 12P A R227 332K/F 1 2 R231 332K/F ICH_RTCX2 2 4 2 1 1 W2 ICH_RTCX1 2 2 1 R322 10M 2 1 1 32.768KHZ PAD PAD PAD IDE_IRQ IDE_DIORDY T116 T117 T118 PAD T66 C R235 2 R319 2 1 8.2K 1 4.7K +3.3V_RUN NH82801HBM-SLA5Q-MM#888654 1 +3.3V_RUN R189 *1K_NC XOR Chain Entrance Strap D D HDA SDOUT Description 2 ICH RSVD RSVD 1 Enter XOR Chain 1 0 Normal Operation (Default) 1 1 Set PCIE port config bit 1 1 2 3 4 QUANTA COMPUTER ACZ_SDOUT ICH_RSVD 13 1 0 0 R326 *1K_NC Title ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN) 2 0 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Thursday, June 12, 2008 7 Rev 1A Sheet 11 of 8 53 1 2 3 4 5 6 7 8 U19D Place TX DC blocking caps close ICH8. PERN1 PERP1 PETN1 PETP1 A C323 C324 PCIE_TX2PCIE_TX2+ 1 1 2 2 0.1U 0.1U 26 26 PCIE_TXN2_C PCIE_TXP2_C 10 10 M27 M26 L29 L28 PERN2 PERP2 PETN2 PETP2 MiniWPAN K27 K26 J29 J28 PERN3 PERP3 PETN3 PETP3 Express Card H27 H26 G29 G28 PERN4 PERP4 PETN4 PETP4 F27 F26 E29 E28 PERN5 PERP5 PETN5 PETP5 D27 D26 C29 C28 PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP C23 B23 E22 SPI_CLK SPI_CS0# SPI_CS1# D23 F21 SPI_MOSI SPI_MISO PCIE_RX2PCIE_RX2+ PCIE_TXN2_C PCIE_TXP2_C MiniWLAN C333 C326 34 PCIE_TX6-/GLAN_TX34 PCIE_TX6+/GLAN_TX+ 1 1 2 2 0.1U 0.1U GLAN_TXN_C GLAN_TXP_C 10 10 76 For EA test use ET45 ET51 ET50 PCIE_RX2+ PCIE_RX6-/GLAN_RXPCIE_RX6+/GLAN_RX+ 1 1 1 34 PCIE_RX6-/GLAN_RX34 PCIE_RX6+/GLAN_RX+ GLAN_TXN_C GLAN_TXP_C 10/100 LOM R259 *1K_NC GNT0# SPI_CS1# LPC 11 No stuff No stuff PCI 10 No stuff Stuff 2 R264 *1K_NC 1 T91 T98 Boot BIOS Strap 1 2 ICH_SPI_CS1#_R PCI_GNT0# SPI 01 Stuff No stuff PAD PAD ICH_SPI_CS1#_R T87 T95 PAD PAD USB_OC0_1# 27 USB_OC0_1# AJ19 AG16 AG15 AE15 AF15 AG17 AD12 AJ18 AD14 AH18 OC2# OC3# OC4# OC5# OC6# OC7# OC8# OC9# B OC0# OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 OC8# OC9# DMI0RXN DMI0RXP DMI0TXN DMI0TXP V27 V26 U29 U28 DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6 DMI_MRX_ITX_N0 6 DMI_MRX_ITX_P0 6 DMI1RXN DMI1RXP DMI1TXN DMI1TXP Y27 Y26 W29 W28 DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6 DMI_MRX_ITX_N1 6 DMI_MRX_ITX_P1 6 DMI2RXN DMI2RXP DMI2TXN DMI2TXP AB26 AB25 AA29 AA28 DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6 DMI_MRX_ITX_N2 6 DMI_MRX_ITX_P2 6 DMI3RXN DMI3RXP DMI3TXN DMI3TXP AD27 AD26 AC29 AC28 DMI_MTX_IRX_N3 6 DMI_MTX_IRX_P3 6 DMI_MRX_ITX_N3 6 DMI_MRX_ITX_P3 6 DMI_CLKN DMI_CLKP T26 T25 DMI_ZCOMP DMI_IRCOMP Y23 Y24 SPI 26 26 PCI-Express Direct Media Interface P27 P26 N29 N28 MiniWWAN USB USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P G3 G2 H5 H4 H2 H1 J3 J2 K5 K4 K2 K1 L3 L2 M5 M4 M2 M1 N3 N2 USBRBIAS# USBRBIAS F2 F3 A CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17 R242 24.9/F 1 2 DMI_COMP +1.5V_PCIE_ICH ICH_USBP0ICH_USBP0+ ICH_USBP1ICH_USBP1+ PAD T78 PAD T102 PAD T76 PAD T77 ICH_USBP4ICH_USBP4+ PAD T104 PAD T103 ICH_USBP6ICH_USBP6+ PAD T74 PAD T73 ICH_USBP8ICH_USBP8+ PAD T106 PAD T108 27 27 27 27 Place within 500mils of ICH8 Side pair Top / left Side pair bottom / right Pair 1 top / left Pair 1 bottom / right 18 18 26 26 Camera Mini Card (WWAN) PCI Pullups Bluetooth 8 26 26 PCI_STOP# PCI_DEVSEL# PCI_REQ1# PCI_PIRQD# Mini Card (WLAN) Biometric 6 7 8 9 10 +3.3V_RUN USBRBIAS OC6# OC2# OC8# OC4# +3.3V_SUS OC3# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# 6 7 8 9 10 5 4 3 2 1 10KX8 R188 1 OC5# OC7# OC9# USB_OC0_1# 2 10K 2 +3.3V_RUN F9 B5 C5 A10 PIRQA# PIRQB# PIRQC# PIRQD# PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3# REQ0# GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55 A4 D7 E18 C18 B19 F18 A11 C10 C/BE0# C/BE1# C/BE2# C/BE3# C17 E15 F16 E17 IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# C8 D9 G6 D16 A7 B7 F10 C16 C9 A17 PLTRST# PCICLK PME# AG24 PCI_PLTRST# B10 CLK_PCI_ICH G7 Interrupt I/F PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 F8 G11 F12 B3 PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PAD T86 PAD T89 20 20 25 25 PCI_RST#_G PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PIRQE# SB_WLAN_PCIE_RST# SB_NB_PCIE_RST# ICH_IRQH_GPIO5 2 3 R257 2 1 20K SB_NB_PCIE_RST# R263 2 1 20K C BIOS should not enable the internal GPIO pull up resistor. PCI_GNT3# PCI_C_BE0# PCI_C_BE1# PCI_C_BE2# PCI_C_BE3# PCI_IRDY# SB_WLAN_PCIE_RST# Non-iAMT R271 *1K_NC 20,25 20,25 20,25 20,25 C335 1 0.047U +3.3V_SUS 2 10 Add Buffers as needed for Loading and fanout concerns. 5 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI +3.3V_RUN U14 PCI_IRDY# 20,25 PCI_PAR 20,25 PCI_DEVSEL# 20,25 PCI_PERR# 20,25 PCI_PLOCK# PCI_SERR# 20,25 PCI_STOP# 20,25 PCI_TRDY# 20,25 PCI_FRAME# 20,25 CLK_PCI_ICH 17 ICH_PME# 20,23,25 PCI_PIRQE# 25 SB_WLAN_PCIE_RST# 26 SB_NB_PCIE_RST# 6 PAD T96 4 2 A16 away override strap. SB_NB_PCIE_RST# 4 PCI_RST#_G 1 Low = A16 swap override enabled. High = Default. PCI_RST# 20,25 TC7SZ32FU(T5L,F,T) +3.3V_SUS C247 1 0.047U For EA test use ET47 1 PCI_AD1 ET60 ET55 ET59 ET48 ET46 ET57 ET53 ET56 ET58 ET54 ET52 ET49 ET61 1 1 1 1 1 1 1 1 1 1 1 1 1 PCI_AD3 PCI_AD7 PCI_AD14 PCI_AD29 PCI_AD13 PCI_AD19 PCI_IRDY# PCI_TRDY# PCI_FRAME# PCI_STOP# PCI_DEVSEL# PCI_GNT0# PCI_REQ0# 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 10 5 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 1 8.2K 1 8.2K PCI_PIRQC# PCI_PIRQB# PCI_PIRQA# PCI_IRDY# +3.3V_SUS CLK_PCI_ICH U13 2 2 D20 E19 D19 A20 D17 A21 A19 C19 A18 B16 A12 E16 A14 G16 A15 B6 C11 A9 D11 B12 C12 D10 C7 F13 E11 E13 E12 D8 A6 E8 D6 A3 8.2KX8 R279 2 R310 2 PCI_REQ2# PCI_REQ3# NH82801HBM-SLA5Q-MM#888654 1 R260 22.6/F U19B PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 D 20 20 20 25 Short F2 and F3 at the package and keep length to less than 500mils. Trace Impedance should be 60ohms +/- 15%. RP41 10 10 10 10 10 10 10 10 10 5 4 3 2 1 4 PCI_PLTRST# 1 R275 *10_NC PLTRST# 6,23,26,34 TC7SZ32FU(T5L,F,T) D 2 1 *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC C344 *8.2P_NC QUANTA COMPUTER 1 C 2 2 2 2 2 2 2 2 2 6 7 8 9 10 1 20,25 PCI_AD[0..31] 1 1 1 1 1 1 1 1 1 PCI_FRAME# ICH_IRQH_GPIO5 PCI_TRDY# PCI_SERR# +3.3V_RUN RP39 2 C249 C253 C251 C436 C435 C252 C441 C431 C434 +3.3V_SUS PCI_PIRQE# PCI_REQ0# PCI_PLOCK# PCI_PERR# 1 OC3# OC6# OC4# OC5# OC7# OC8# OC2# USB_OC0_1# OC9# Non-iAMT B 5 4 3 2 1 8.2KX8 NH82801HBM-SLA5Q-MM#888654 WWAN Noise - ICH improvements +3.3V_RUN RP40 Express Card 16 Reserved for EMI.Place resister and cap close to ICH. 6 Title ICH8-M (USB,DMI,PCIE,PCI) Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 12 of 8 53 1 2 +3.3V_SUS 3 4 5 6 7 8 Non-iAMT RP23 1 3 ICH_SMBDATA ICH_SMBCLK 2 4 Place these close to ICH8. 2.2KX2 CLK_ICH_48M Non-iAMT 1 +3.3V_SUS A 2 1 1 1 RP22 ICH_SMLINK0 ICH_SMLINK1 1 U19C 2 T84 PAD 3 ITP_DBRESET# 1 R340 8.2K RI# F4 AD15 SUS_STAT#/LPCPD# SYS_RESET# AG12 BMBUSY#/GPIO0 AG22 SMBALERT#/GPIO11 USB_MCARD1_DET# 26 USB_MCARD1_DET# CLKRUN# AE20 AG18 STP_PCI#/GPIO15 STP_CPU#/GPIO25 CLKRUN# AH11 CLKRUN#/GPIO32 PCIE_WAKE# IRQ_SERIRQ THERM_ALERT# AE17 AF12 AC13 WAKE# SERIRQ THRM# IMVP_PWRGD AJ20 VRMPWRGD 1 17 H_STP_PCI# 17 H_STP_CPU# 2 20,23,25 CLKRUN# 26,34 PCIE_WAKE# 20,23,25 IRQ_SERIRQ 31 THERM_ALERT# Option to " Disable " clkrun. Pulling it down will keep the clks running. 23,35,39 IMVP_PWRGD 26 PCIE_MCARD1_DET# T125 PAD AJ22 T41 PAD T128 PAD 23 SIO_EXT_WAKE# 23 SIO_EXT_SMI# 23 SIO_EXT_SCI# T46 PAD PCIE_MCARD1_DET# AJ8 AJ9 AH9 AE16 AC19 AG8 AH12 AE11 AG10 AH25 AD16 AG13 AF9 AJ11 AD10 SIO_EXT_SMI# SIO_EXT_SCI# T53 PAD T44 PAD 26 WLAN_RADIO_DIS# T54 PAD 17 SATA_CLKREQ# T49 PAD T126 PAD T57 PAD 32 PLTRST_DELAY# SPKR SPKR MCH_ICH_SYNC#_R 6 MCH_ICH_SYNC# C 11 ICH_RSVD AD9 TP7 TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 GPIO12 TACH0/GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 QRT_STATE0/GPIO27 QRT_STATE1/GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 SPKR AJ13 MCH_SYNC# AJ21 TP3 CLK14 CLK48 CLK_ICH_14M CLK_ICH_48M ICH_SUSCLK SUSCLK SLP_S3# SLP_S4# SLP_S5# AG23 AF21 AD18 S4_STATE#/GPIO26 AH27 PWROK AE23 DPRSLPVR/GPIO16 AJ14 BATLOW# AE21 PWRBTN# C2 LAN_RST# AH20 RSMRST# AG27 CLPWROK CLK_ICH_14M AG9 G5 D3 CK_PWRGD T90 C250 *4.7P_NC 50 ICH_PWRGD DPRSLPVR ICH_BATLOW# ICH_PWRGD 6,35 DPRSLPVR 6,39 R219 2 8.2K 1 6 SIO_PWRBTN# 23 RSV_ICH_LAN_RST# ICH_RSMRST# PAD T40 ICH_RSMRST# 23 CLK_PWRGD 17 ICH_CL_PWROK ICH_CL_PWROK SLP_M# AJ25 CL_CLK0 CL_CLK1 F23 AE18 RSV_ICH_CL_CLK1 CL_CLK0 6 PAD T55 CL_DATA0 CL_DATA1 F22 AF19 RSV_ICH_CL_DATA1 CL_DATA0 6 PAD T48 CL_VREF0 CL_VREF1 D24 AH23 CL_VREF0 CL_VREF1 CL_RST# AJ23 MEM_LED/GPIO24 ME_EC_ALERT/GPIO10 EC_ME_ALERT/GPIO14 WOL_EN/GPIO9 AJ27 AJ24 AF22 AG19 PAD PAD B +3.3V_SUS T130 6,23 Non-iAMT ICH_PWRGD R211 2 1 10K DPRSLPVR R330 1 2 100K ICH_RSMRST# R323 1 2 10K RSV_ICH_LAN_RST# R192 2 1 10K ICH_CL_PWROK R265 2 1 1M RSV_GPIO10 R187 2 1 10K +3.3V_SUS T42 ICH_CL_RST0# 6 RSV_GPIO10 RSV_GPIO14 RSV_WOL_EN PAD PAD PAD R228 2 T131 T63 T45 8.2K 1 C +3.3V_SUS Non-iAMT PLTRST_DELAY# +3.3V_RUN +3.3V_SUS 2 1*10K_NC PAD E1 E3 R201 *10_NC CLK_ICH_14M 17 CLK_ICH_48M 17 SIO_SLP_S3# 23 PAD T52 SIO_SLP_S5# 23 NH82801HBM-SLA5Q-MM#888654 R208 2 50 AJ12 AJ10 AF11 AG11 2 AF17 RSV_LPCPD# SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37 SATA GPIO ICH_RI# 6 PM_BMBUSY# R333 *10_NC B SMBCLK SMBDATA LINKALERT# SMLINK0 SMLINK1 1 1 +3.3V_RUN AJ26 AD19 AG21 AC17 AE19 SMB PAD PAD PAD ICH_SMBCLK ICH_SMBDATA RSV_ICH_CL_RST1# ICH_SMLINK0 ICH_SMLINK1 Clocks 26 ICH_SMBCLK 26 ICH_SMBDATA T43 T61 T69 SYS GPIO Power MGT ICH_SMLINK0 ICH_SMLINK1 MISC GPIO Controller Link ICH_SMBCLK ICH_SMBDATA C321 *4.7P_NC 2 R206 8.2K *10KX2_NC 2 2 4 +3.3V_RUN +3.3V_RUN SPKR 3 MEM_SDATA 15 10 1 R262 453/F 1 C325 0.1U Q10 2N7002W Low = Default. High = No Reboot. 2 *10K_NC MCH_ICH_SYNC#_R IRQ_SERIRQ 1 10K THERM_ALERT# 1 10K R203 *453/F_NC C256 *0.1U_NC 10 +3.3V_RUN 2 R327 1 R198 2 R197 2 1 2 26 ICH_SMBDATA 2 No Reboot strap. CL_VREF1 1 1 SPKR 1 3 PCIE_MCARD1_DET# RP15 2.2KX2 2 10K 2 R339 CL_VREF0 These are for backdrive issue. 2 R220 *1K_NC 1 *2.2K_NC IMVP_PWRGD R324 2 R205 *3.24K/F_NC 1 2 4 1 +3.3V_RUN R258 3.24K/F Non-iAMT SMbus address D2 1 +3.3V_RUN 2 1 3 A R256 *10_NC 1 2 +3.3V_SUS 1 2 2 2 +3.3V_RUN RSV_ICH_CL_RST1# ICH_RI# SIO_EXT_SCI# PCIE_WAKE# 2 ASF 2.0 *10K_NC 10K 10K 1K 2 Non-iAMT R193 R195 R238 R190 D D 26 ICH_SMBCLK 3 1 MEM_SCLK 15 Q13 2N7002W +3.3V_SUS R196 2 R191 R194 2 1 10K 10K 1 10K 1 SIO_EXT_SMI# USB_MCARD1_DET# RSV_WOL_EN QUANTA COMPUTER Title ICH8-M (PM,GPIO,SMB,CL) 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Saturday, June 21, 2008 7 Rev 1A Sheet 13 of 8 53 1 2 3 4 5 6 7 8 2 +RTC_CELL +1.5V_RUN 1 1 2 1 C329 0.1U 10 10 10 10 10 WWAN Noise - ICH improvements0805 +3.3V_RUN C336 0.1U VCCSUSHDA AD11 VCCSUS1_05[1] VCCSUS1_05[2] J6 AF20 TP_VCCSUS1.05_1 TP_VCCSUS1.05_2 VCCSUS1_5[1] AC16 TP_VCCSUS1.5_1 VCCSUS1_5[2] J7 TP_VCCSUS1.5_2 VCCSUS3_3[01] C3 +VCCSUS3_3[0~6] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04] VCCSUS3_3[05] VCCSUS3_3[06] AC18 AC21 AC22 AG20 AH28 VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] P6 P7 C1 N7 P1 P2 P3 P4 P5 R1 R3 R5 R6 10 10 1 C276 0.1U 10 2 1 C279 0.1U 2 C282 0.1U C338 0.1U 10 C287 0.1U 10 Non-iAMT AC12 1 1 C322 0.1U 10 VCCHDA C281 4.7U 2 1 C277 0.1U 2 2 2 C284 0.1U C273 0.1U 10 +3.3V_SUS +3.3V_RUN 2 +3.3V_RUN VCCLAN3_3[1] VCCLAN3_3[2] A24 VCCGLANPLL 10 1 +1.5V_PCIE_ICH C343 0.1U A26 A27 B26 B27 B28 VCCGLAN1_5[1] VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4] VCCGLAN1_5[5] 2 1 10 2 C404 4.7U B25 VCCGLAN3_3 6.3 +3.3V_RUN 2 2 1 2 1 C248 0.022U 0603 16 WWAN Noise - ICH improvements 10 C310 *0.1U_NC 10 C311 *0.1U_NC 10 C314 *0.1U_NC 2 C288 *0.1U_NC 1 +VCCSUS3_3[7~19] 10 C296 0.1U 10 VCCCL1_05 G22 TP_VCCCL1.05 VCCCL1_5 A22 +VCCCL1_5 VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] K7 L1 L13 L15 L26 L27 L4 L5 M12 M13 M14 M15 M16 M17 M23 M28 M29 M3 N1 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 N4 N5 N6 P12 P13 P14 P15 P16 P17 P23 P28 P29 R11 R12 R13 R14 R15 R16 R17 R18 R28 R4 T12 T13 T14 T15 T16 T17 T2 U12 U13 U14 U15 U16 U17 U23 U26 U27 U3 U5 V13 V15 V28 V29 W2 W26 W27 Y28 Y29 Y4 AB4 AB23 AB5 AB6 AD5 U4 W24 VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12] A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29 A B C VCCCL3_3[1] VCCCL3_3[2] F20 G21 +3.3V_RUN Non-iAMT C342 *0.1U_NC 10 C350 *1U_NC 0603 10 4 5 D QUANTA COMPUTER PAD T80 Title ICH8-M (POWER,GND) Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 NH82801HBM-SLA5Q-MM#888654 3 VSS[001] VSS[002] VSS[003] VSS[004] VSS[005] VSS[006] VSS[007] VSS[008] VSS[009] VSS[010] VSS[011] VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] NH82801HBM-SLA5Q-MM#888654 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 0603 C337 0.022U 0603 16 2 1 1 GLAN POWER F19 G20 1 2 +1.5V_RUN VCCLAN1_05[1] VCCLAN1_05[2] +3.3V_SUS Non-iAMT 1 VCC1_5_A[25] TP_VCCSUSLAN1 F17 TP_VCCSUSLAN2 G18 PAD PAD C320 0.1U W23 10 2 T83 T81 VCC1_5_A[20] VCC1_5_A[21] VCC1_5_A[22] VCC1_5_A[23] VCC1_5_A[24] C280 0.1U 10 PAD T79 2 Non-iAMT 10 F1 L6 L7 M6 M7 C275 0.1U 1 1 10 C409 0.1U VCCUSBPLL PAD T59 1 2 2 1 C407 0.1U D1 USB CORE +1.5V_RUN VCC1_5_A[18] VCC1_5_A[19] PAD T75 PAD T47 2 AC7 AD7 VCC1_5_A[15] VCC1_5_A[16] VCC1_5_A[17] 1 C278 1U 0603 10 +1.5V_RUN 1 C268 0.1U 10 2 2 C257 10U 0603 6.3 G12 G17 H7 D 1 VCC1_5_A[13] VCC1_5_A[14] 1 AA5 AA6 A8 B15 B18 B4 B9 C15 D13 D5 E10 E7 F11 2 VCC1_5_A[11] VCC1_5_A[12] VCC3_3[14] VCC3_3[15] VCC3_3[16] VCC3_3[17] VCC3_3[18] VCC3_3[19] VCC3_3[20] VCC3_3[21] VCC3_3[22] VCC3_3[23] VCC3_3[24] 2 AC10 AC9 AA3 U7 V7 W1 W6 W7 Y7 1 VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08] VCC1_5_A[09] VCC1_5_A[10] VCC3_3[07] VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] 2 AC1 AC2 AC3 AC4 AC5 AC8 AD8 AE8 AF8 1 VCC1_5_A[01] VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05] VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06] 10 +1.05V_VCCP 1 +1.5V_RUN 1 C265 1U 0603 10 2 2 2 1 2 +VCCSATPLL 1 C 10uH+-20%_100mA C274 1U 0603 10 AE7 AF7 AG7 AH7 AJ7 ATX L18 10uH 0805 VCCSATAPLL ARX 1 +VCCSATPLL_L AJ6 VCC3_3[02] AD2 Place C364,C373,C367 close to AC23/AC24. C418 22U 1206 10 +3.3V_RUN 2 +VCCSATPLL AF29 C267 0.1U 2 +1.5V_RUN VCC3_3[01] C295 10U 0603 6.3 +1.25V_RUN +1.05V_VCCP +1.5V_RUN 1 1 R316 +1.5V_DMIPLL_R 2 2 C315 2.2U 0805 10 AC23 AC24 25 1 1 C340 22U 1206 10 2 C297 22U 1206 10 V_CPU_IO[1] V_CPU_IO[2] 1uH 2 2 1 1 C405 220U 7343 2.5 2 2 + 65 AE28 AE29 C413 0.01U 1 55 1 B R29 VCC_DMI[1] VCC_DMI[2] L25 +1.5V_DMIPLL 2 +1.5V_PCIE_ICH VCCDMIPLL BAT54C T/R 1uH+-20%_800mA 1 FB_330ohm+-25%_100mHz_ 1.5A_0.09 ohm DC VCCA3GP L21 BLM21PG331SN1D 0805 2 2 +1.5V_RUN R244 10 0805 D17 1 1 2 C406 1U 0603 10 +1.5V_RUN 3 1 2 +ICH_V5REF_SUS 1 SDMK0340L-7-F VCC1_5_B[01] VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46] +1.05V_VCCP A23 A5 AA2 AA7 A25 AB1 AB24 AC11 AC14 AC25 AC26 AC27 AD17 AD20 AD28 AD29 AD3 AD4 AD6 AE1 AE12 AE2 AE22 AD1 AE25 AE5 AE6 AE9 AF14 AF16 AF18 AF3 AF4 AG5 AG6 AH10 AH13 AH16 AH19 AH2 AF28 AH22 AH24 AH26 AH3 AH4 AH8 AJ5 B11 B14 B17 B2 B20 B22 B8 C24 C26 C27 C6 D12 D15 D18 D2 D4 E21 E24 E4 E9 F15 E23 F28 F29 F7 G1 E2 G10 G13 G19 G23 G25 G26 G27 H25 H28 H29 H3 H6 J1 J25 J26 J27 J4 J5 K23 K28 K29 K3 K6 10 2 2 D23 AA25 AA26 AA27 AB27 AB28 AB29 D28 D29 E25 E26 E27 F24 F25 G24 H23 H24 J23 J24 K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T23 T24 T27 T28 T29 U24 U25 V23 V24 V25 W25 Y25 10 C286 0.1U 1 1 2 V5REF_SUS A13 B13 C13 C14 D14 E14 F14 G14 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 1 +3.3V_SUS 100 2 V5REF[1] V5REF[2] VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26] VCC1_05[27] VCC1_05[28] 2 1 G4 CORE +5V_SUS C403 1U 0603 10 VCCP_CORE 1 2 A R313 A16 T7 +ICH_V5REF_RUN 1 VCCRTC IDE D22 1 U19F AD25 SDMK0340L-7-F Non-iAMT 2 1 10 C319 0.1U 1 2 2 10 PCI 2 C255 *0.1U_NC VCCPSUS +3.3V_RUN 100 2 C283 0.1U VCCPUSB R311 1 C254 1U 0603 10 1 1 +1.05V_VCCP 2 +5V_RUN U19E 6 7 Rev 1A Sheet 14 of 8 53 DDR_A_D41 DDR_A_D40 DDR_A_DM5 DDR_A_D42 DDR_A_D46 DDR_A_D48 DDR_A_D53 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D54 DDR_A_D56 DDR_A_D61 DDR_A_DM7 DDR_A_D59 DDR_A_D62 D 13 13 MEM_SDATA MEM_SCLK +3.3V_RUN MEM_SDATA MEM_SCLK DDR2_SODIMM SMbus address A0 Non-iAMT 1 2 M_ODT0 6,16 7,16 DDR_B_CAS# 6,7,16 DDR_CS3_DIMMB# 6,16 M_ODT3 DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# M_ODT3 DDR_A_D33 DDR_A_D32 DDR_B_D32 DDR_B_D33 DDR_A_DM4 DDR_B_DQS#4 DDR_B_DQS4 DDR_A_D34 DDR_A_D39 +3.3V_RUN DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D43 DDR_A_D47 DDR_B_D34 DDR_B_D35 Non-iAMT DDR_B_D41 DDR_B_D40 C269 2.2U 0603 6.3 DDR_B_DM5 C272 0.1U DDR_B_D47 DDR_B_D42 10 DDR_A_D52 DDR_A_D49 DDR_B_D52 DDR_B_D49 M_CLK_DDR1 6 M_CLK_DDR#1 6 DDR_A_DM6 DDR_B_DQS#6 DDR_B_DQS6 DDR_A_D51 DDR_A_D55 DDR_B_D54 DDR_B_D51 DDR_A_D60 DDR_A_D57 DDR_B_D56 DDR_B_D57 DDR_A_DQS#7 DDR_A_DQS7 DDR_B_DM7 DDR_A_D58 DDR_A_D63 DDR_B_D62 DDR_B_D59 Non-iAMT MEM_SDATA MEM_SCLK +3.3V_RUN R239 10K 2-1734073-2 R246 10K SMbus address A4 3 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 1 1 2 2 DDR_B_BS1 7,16 DDR_B_RAS# 7,16 DDR_CS2_DIMMB# 6,16 M_ODT2 DDR_B_MA13 M_ODT2 1 2 1 2 1 1 2 2 1 C424 2.2U 0603 6.3 2 1 2 1 C423 2.2U 0603 6.3 C421 2.2U 0603 6.3 +1.8V_SUS Place these Caps near So-Dimm1. 6,16 DDR_B_D36 DDR_B_D37 C356 0.1U 10 DDR_B_DM4 C352 0.1U 10 C353 0.1U 10 + C452 *330U_NC 7343 6.3 C355 0.1U 10 +1.8V_SUS C Place these Caps near So-Dimm2. DDR_B_D38 DDR_B_D39 DDR_B_D44 DDR_B_D45 DDR_B_DQS#5 DDR_B_DQS5 C349 0.1U 10 C359 0.1U 10 C357 0.1U 10 C351 0.1U 10 DDR_B_D43 DDR_B_D46 DDR_B_D48 DDR_B_D55 M_CLK_DDR4 6 M_CLK_DDR#4 6 +3.3V_RUN DDR_B_DM6 DDR_B_D53 DDR_B_D50 DDR_B_D61 DDR_B_D60 DDR_B_DQS#7 DDR_B_DQS7 Non-iAMT C299 2.2U 0603 6.3 C313 0.1U 10 Non-iAMT D DDR_B_D58 DDR_B_D63 +3.3V_RUN QUANTA COMPUTER R276 10K 2 1 R277 10K CLOCK 2,3 CKE 2,3 4 DDR_B_BS1 DDR_B_RAS# C422 2.2U 0603 6.3 1 M_ODT0 DDR_A_MA13 7,16 DDR_B_BS0 7,16 DDR_B_WE# DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 C420 2.2U 0603 6.3 2 DDR_A_BS1 7,16 DDR_A_RAS# 7,16 DDR_CS0_DIMMA# 6,7,16 B 1 DDR_A_BS1 DDR_A_RAS# C425 2.2U 0603 6.3 Place these Caps near So-Dimm2. 2 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 C346 2.2U 0603 6.3 DDR_B_MA14 6,16 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 1 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 C348 2.2U 0603 6.3 +1.8V_SUS DDR_CKE4_DIMMB 6,16 2 DDR_B_BS2 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 C345 2.2U 0603 6.3 DDR_B_D31 DDR_B_D30 1 7,16 DDR_B_BS2 C347 2.2U 0603 6.3 2 DDR_A_MA14 6,16 1 2 6,16 DDR_CKE3_DIMMB 2 1 1 2 DDR_CKE1_DIMMA 6,16 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 CLOCK 0,1 CKE 0,1 DDR_B_D26 DDR_B_D27 DDR_B_DQS#3 DDR_B_DQS3 2 DDR_A_D35 DDR_A_D38 DDR_A_D31 DDR_A_D27 DDR_B_D24 DDR_B_D25 1 C DDR_B_DM3 Place these Caps near So-Dimm1. +1.8V_SUS 2 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_DQS#3 DDR_A_DQS3 PM_EXTTS#1 6 DDR_B_D18 DDR_B_D23 1 DDR_A_D36 DDR_A_D37 DDR_B_D29 DDR_B_D28 PM_EXTTS#1 DDR_B_DM2 2 M_ODT1 6,16 M_ODT1 DDR_A_D29 DDR_A_D28 DDR_B_D16 DDR_B_D21 1 DDR_A_CAS# DDR_B_D22 DDR_B_D19 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 2 7,16 DDR_A_CAS# 6,16 DDR_CS1_DIMMA# PM_EXTTS#0 6 DDR_A_D18 DDR_A_D19 VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA1 M_CLK_DDR3 6 M_CLK_DDR#3 6 1 DDR_A_MA10 DDR_A_BS0 DDR_A_WE# 7,16 DDR_A_BS0 7,16 DDR_A_WE# DDR_B_DQS#2 DDR_B_DQS2 VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD) A C298 2.2U 0603 6.3 DDR_B_D14 DDR_B_D15 2 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 PM_EXTTS#0 DDR_A_DM2 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 10 1 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_B_D17 DDR_B_D20 C294 0.1U DDR_B_DM1 2 DDR_A_BS2 7,16 DDR_A_BS2 DDR_A_D20 DDR_A_D16 DDR_B_D12 DDR_B_D13 1 6,16 DDR_CKE0_DIMMA DDR_B_D10 DDR_B_D11 DDR_B_D6 DDR_B_D3 2 DDR_A_D30 DDR_A_D26 M_CLK_DDR0 6 M_CLK_DDR#0 6 DDR_A_D14 DDR_A_D15 V_DDR_MCH_REF DDR_B_DM0 1 B DDR_B_DQS#1 DDR_B_DQS1 DDR_B_D4 DDR_B_D1 2 DDR_A_DM3 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 DDR_B_D8 DDR_B_D9 DDR_A_DM1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 DDR_A_D24 DDR_A_D25 VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA1 DDR_B_D2 DDR_B_D7 VSS46 DQ4 DQ5 VSS15 DM0 VSS5 DQ6 DQ7 VSS16 DQ12 DQ13 VSS17 DM1 VSS53 CK0 CK0# VSS41 DQ14 DQ15 VSS54 2 DDR_A_D22 DDR_A_D23 VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD) 10 C312 2.2U 0603 6.3 VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50 2 DDR_A_DQS#2 DDR_A_DQS2 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 DDR_A_D13 DDR_A_D9 C316 0.1U 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 DDR_A_D21 DDR_A_D17 DDR_A_D7 DDR_A_D6 DDR_B_DQS#0 DDR_B_DQS0 1 DDR_A_D10 DDR_A_D11 DDR_A_DM0 2 DDR_A_DQS#1 DDR_A_DQS1 DDR_B_D0 DDR_B_D5 8 DDR_B_DM[0..7] 7 DDR_B_D[0..63] 7 DDR_B_DQS[0..7] 7 DDR_B_DQS#[0..7] 7 DDR_B_MA[0..13] 7,16 CN4 V_DDR_MCH_REF 1 DDR_A_D12 DDR_A_D8 DDR_A_D4 DDR_A_D5 7 V_DDR_MCH_REF 2 DDR_A_D3 DDR_A_D2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 6 +1.8V_SUS 1 A VSS46 DQ4 DQ5 VSS15 DM0 VSS5 DQ6 DQ7 VSS16 DQ12 DQ13 VSS17 DM1 VSS53 CK0 CK0# VSS41 DQ14 DQ15 VSS54 2 DDR_A_DQS#0 DDR_A_DQS0 VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50 5 +1.8V_SUS DDR_A_DM[0..7] 7 DDR_A_D[0..63] 7 DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7 DDR_A_MA[0..13] 7,16 CN6 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 DDR_A_D0 DDR_A_D1 4 V_DDR_MCH_REF PC4800 DDR2 SDRAM SO-DIMM (200P) A is required to route to Top SoDIMM for AMTto function. Ch.A SODIMM needs to be populated for Intel AMT support. 3 +1.8V_SUS PC4800 DDR2 SDRAM SO-DIMM (200P) 2 +1.8V_SUS 2 1 6 Title DDR2 SO-DIMM (200P) X 2 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 15 of 8 53 1 2 3 4 5 6 7 8 Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM. +0.9V_DDR_VTT 1 C303 0.1U C304 0.1U 2 10 1 C309 0.1U 2 10 1 1 10 C292 0.1U 2 10 C291 0.1U 2 1 1 1 1 10 C318 0.1U 2 10 C293 0.1U 2 10 C308 0.1U 2 10 C302 0.1U 2 1 C307 0.1U 2 10 1 1 1 10 C306 0.1U 2 10 C305 0.1U 2 10 C301 0.1U 2 C334 0.1U 2 2 1 A 1 A 10 10 10 C300 0.1U 1 C327 0.1U C285 0.1U 2 10 1 C260 0.1U 2 10 1 C264 0.1U 2 10 1 C270 0.1U 2 10 1 C271 0.1U 2 10 1 C259 0.1U 2 10 1 C317 0.1U 2 10 1 C263 0.1U 2 10 1 C290 0.1U 2 10 1 1 C258 0.1U 2 10 1 C262 0.1U 2 10 2 1 C261 0.1U 2 2 1 +0.9V_DDR_VTT 10 10 7,15 DDR_A_MA[0..13] B B +0.9V_DDR_VTT DDR_B_MA[0..13] RP27 DDR_A_MA7 DDR_A_MA11 2 4 DDR_A_MA4 DDR_A_MA6 2 4 DDR_A_RAS# DDR_A_BS1 2 4 RP38 1 3 1 3 1 3 1 3 1 3 1 3 56x2 RP28 DDR_A_MA13 M_ODT0 2 4 DDR_A_BS2 DDR_A_MA12 2 4 1 3 1 3 DDR_A_MA9 DDR_A_MA8 2 4 Please these resistor closely DIMMB,all trace length<750 mil. DDR_A_MA3 DDR_A_MA5 2 4 1 3 1 3 1 3 1 3 1 3 1 3 56x2 RP18 DDR_A_MA10 DDR_A_BS0 DDR_A_CAS# DDR_A_WE# 1 3 1 3 1 3 1 3 56x2 RP26 R212 DDR_A_MA1 R214 R243 R213 R215 R233 R245 1 1 1 1 1 1 1 6,7,15 DDR_CS0_DIMMA# 6,15 DDR_CS1_DIMMA# 6,15 DDR_CKE0_DIMMA 6,15 DDR_CKE1_DIMMA 6,15 DDR_A_MA14 D 2 4 DDR_B_MA3 DDR_B_MA1 2 4 DDR_B_MA8 DDR_B_MA12 2 4 DDR_B_MA5 DDR_B_MA9 2 4 DDR_B_WE# DDR_B_BS0 2 4 DDR_B_CAS# DDR_B_MA10 2 4 DDR_B_MA0 DDR_B_MA2 M_ODT2 6,15 C Please these resistor closely DIMMA,all trace length<750 mil. DDR_B_WE# 7,15 DDR_B_BS0 7,15 DDR_B_CAS# 7,15 56x2 RP36 1 3 1 3 56x2 6,15 M_ODT1 M_ODT2 DDR_B_MA13 56x2 RP29 2 4 2 4 2 4 DDR_B_RAS# 7,15 DDR_B_BS1 7,15 56x2 RP30 2 4 DDR_A_MA0 DDR_A_MA2 DDR_B_RAS# DDR_B_BS1 56x2 RP32 56x2 RP16 7,15 DDR_A_CAS# 7,15 DDR_A_WE# 2 4 56x2 RP33 56x2 RP17 7,15 DDR_A_BS0 DDR_B_MA6 DDR_B_MA4 56x2 RP31 56x2 RP19 C 2 4 56x2 RP34 56x2 RP20 7,15 DDR_A_BS2 DDR_B_MA7 DDR_B_MA11 56x2 RP35 56x2 RP24 6,15 M_ODT0 2 4 56x2 RP37 56x2 RP25 7,15 DDR_A_RAS# 7,15 DDR_A_BS1 7,15 2 2 2 2 2 2 2 56 56 56 56 56 56 56 R253 R251 R268 R254 R255 R269 R267 56x2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 56 56 56 56 56 56 56 M_ODT3 6,15 DDR_B_BS2 7,15 DDR_CS2_DIMMB# DDR_CS3_DIMMB# DDR_CKE3_DIMMB DDR_CKE4_DIMMB DDR_B_MA14 6,15 6,15 6,7,15 6,15 6,15 D QUANTA COMPUTER Title DDR2 RES ARRAY 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 16 of 8 53 1 2 3 4 5 6 7 8 Add capacitor pads for improving WWAN. C82 C59 C62 C61 C63 1 1 1 1 2 2 2 2 20P *27P_NC *27P_NC *27P_NC *27P_NC CLK_ICH_48M CLK_ICH_14M CLK_PCI_8512 CLK_PCI_PCCARD CLK_PCI_ICH 50 50 50 50 50 U5 +CK_VDD_PCI 9 4 23 16 46 62 +CK_VDD_PLL3 +CK_VDD_48 +CK_VDD_SRC A +CK_VDD_MAIN 19 27 33 43 52 56 Y2 2 CLK_XTAL_OUT 1 2 14.318MHZ 50 SATA_CLKREQ# CLK_3GPLLREQ# 25,26 CLK_LPC_DEBUG 20 CLK_PCI_PCCARD 23 CLK_PCI_8512 12 CLK_PCI_ICH 13 CLK_ICH_48M R60 R63 1 1 2 475/F 2 475/F CLK_LPC_DEBUG R46 CLK_PCI_PCCARD R56 1 2 2 *22_NC 1 33 CLK_PCI_8512 2 1 33 R64 CLK_PCI_ICH R54 2 1 33 CLK_ICH_48M R72 2 1 33 BLM18AG601SN1D R68 R73 R61 1 1 1 2 8.2K 2 8.2K 2 8.2K R52 2 1 33 L6 3,6 CPU_MCH_BSEL0 3,6 CPU_MCH_BSEL1 3,6 CPU_MCH_BSEL2 L5 BLM18AG601SN1D CLK_ICH_14M 13 CLK_ICH_14M 13 CLK_PWRGD VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO CK505 QFN64 15 18 22 26 30 36 49 59 1 GND GND GND GND GND GND GND GND GND SATA_CLKREQ#_C CLK_3GPLLREQ#_C PCI_PCCARD PCI_SIO 27M_SEL PCI_ICH 8 10 11 12 13 14 CR#_A/PCI-0 CR_B/PCI-1 TME/PCI-2 SRC5_EN/PCI-3 27M_SEL/PCI-4 ITP_EN/PCIF-5# FSA FSB FSC 17 64 5 FSA/USB48 FSB/TEST_MODE FSC/TEST_SEL/REF 55 63 RESET# CK_PWRGD/PD# 50 14.318MHz 13 SATA_CLKREQ# 6 CLK_3GPLLREQ# B C77 33P 1 C67 33P 1 2 CLK_XTAL_IN VDD_PCI VDD_REF VDD_PLL3 VDD_48 VDD_SRC VDD_CPU CLK_XTAL_OUT CLK_XTAL_IN 2 3 XOUT XIN CLK_SDATA CLK_SCLK 6 7 SDATA SCLK CPU-0 CPU-0# 61 60 CPU_BCLK CPU_BCLK# 4 2 3 RP5 1 0x2 CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3 CPU-1 CPU-1# 58 57 MCH_BCLK MCH_BCLK# 4 2 3 RP6 1 0x2 CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5 SRC-8/CPU_ITP SRC-8#/CPU_ITP# 54 53 PCIE_MINI1 PCIE_MINI1# 4 2 3 RP8 1 0x2 CLK_PCIE_MINI1 26 CLK_PCIE_MINI1# 26 SRC-0/DOT96 SRC-0#/DOT96# 20 21 DOT96_SSC DOT96_SSC# 3 1 4 RP4 2 0x2 MCH_DREFCLK 6 MCH_DREFCLK# 6 3 1 4 RP7 2 0x2 DREF_SSCLK 6 DREF_SSCLK# 6 2 4 1 RP9 3 0x2 CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11 A SRC-1/SE1 SRC-1#/SE2 24 25 27M_SS 27M_NSS SRC-2/SATA SRC-2#/SATA# 28 29 PCIE_SATA PCIE_SATA# CR#_C/SRC-3 CR#_D/SRC-3# 31 32 SRC-4 SRC-4# 34 35 PCI_STOP#/SRC-5 CPU_STOP#/SRC5-5# 45 44 SRC-6 SRC-6# 48 47 CR#_F/SRC-7 CR#_E/SRC-7# 51 50 SRC-9 SRC-9# 37 38 SRC-10 SRC-10# 41 42 PCIE_ICH PCIE_ICH# 2 4 1 RP10 3 0x2 CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12 CR#_H/SRC-11 CR#_G/SRC-11# 40 39 PCIE_LOM PCIE_LOM# 4 2 3 RP11 1 0x2 CLK_PCIE_LOM 34 CLK_PCIE_LOM# 34 GND 65 MCH_3GPLL MCH_3GPLL# 1 RP12 3 0x2 2 4 +3.3V_RUN H_STP_PCI# H_STP_CPU# R80 R81 1 *10K_NC 1 *10K_NC 2 2 Silego need pull up but other? CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6 H_STP_PCI# 13 H_STP_CPU# 13 MINI1CLK_REQ#_C SRC-7# R76 1 MINI1CLK_REQ# 2 475/F MINI1CLK_REQ# 26 B +3.3V_RUN SLG8SP513V CLK_3GPLLREQ# SATA_CLKREQ# SRC-7# MINI1CLK_REQ# PCI_PCCARD PCI_SIO BLM21PG600SN1D +CK_VDD_MAIN R65 1 2.2 2 10 10 1 C88 0.1U 10 +3.3V_RUN 1 SMbus address D2 2 C78 0.1U Non-iAMT These are for backdrive issue. 1 1 3 +CK_VDD_PLL3 2 R53 *10K_NC RP3 2.2KX2 2 10 2.2 2 PCI_ICH +CK_VDD_PCI 0805 120 ohms@100Mhz R83 1 C91 *10U_NC 0603 6.3 1 1 C86 0.1U 2 C89 0.1U 2 1 1 10 2 2 C90 0.1U 2 BLM21PG600SN1D 10 1 L9 C83 0.1U 3 18,23,31 SMBDAT1 C85 0.1U 1 CLK_SDATA R185 POP: For Internal pull-low. R439 POP: For internal pull-high. Q4 2N7002W 2 +3.3V_RUN 1 10 R48 *10K_NC C79 4.7U 0603 6.3 27M_SEL (PIN13) PIN20 FSC FSB FSA CPU SRC PCI 1 0 1 100 100 33 0 0 1 133 100 33 0 1 1 166 100 33 0 1 0 200 100 33 0 0 0 266 100 33 1 0 0 333 100 33 1 1 0 400 100 33 1 1 1 RSVD 100 33 PIN21 0=UMA DOT96T 1 = Disc. GRFX down SRCT0 1 C80 0.1U 2 2 2 *10K_NC 1 C +3.3V_RUN +CK_VDD_48 1 2.2 2 R57 27M_SEL 10 R66 1 10K 10K 10K 10K *10K_NC R59 *10K_NC 2 4 10 2 1 C87 0.1U 2 1 2 C 1 0805 120 ohms@100Mhz 1 1 1 1 2 2 L8 2 2 2 2 1 +3.3V_RUN UMA without iAMT +3.3V_RUN R55 R47 R79 R77 R45 27M_SEL PIN24 PIN25 DOT96C 96/ 100M_T SRCC0 27Mout 96/ 100M_C 27MSSout +CK_VDD_SRC 3 18,23,31 SMBCLK1 C84 0.1U 1 Title 10 1 2 QUANTA COMPUTER R58 10K CLK_SCLK Q3 2N7002W 1 2 1 2.2 2 2 D R376 1 2 D CLOCK GENERATOR 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 17 of 8 53 5 4 3 2 1 +LCDVCC +3.3V_RUN 3 23 LCDVCC_TST_EN EN_LCDVCC D25 BAT54C T/R 2 2 Q38 DDTC124EUA-7-F C 2 10 LCD_A1- 6 LCD_A1+ 6 1 C95 0.047U 2 1 C98 0.1U 10 C489 0.1U 10 D LCD_A0- 6 LCD_A0+ 6 LCD_DDCCLK 6 LCD_DDCDAT 6 GFX_PWR_SRC USBP4_D+ USBP4_D- +5V_RUN +3.3V_RUN +LCDVCC C103 0.1U 0603 50 1 C112 0.1U 0603 50 2 +5V_RUN DMIC_CLK 32 DMIC_DATA 32 1 34 2 2 1 LCD_A2- 6 LCD_A2+ 6 C481 0.1U 0603 50 LCD_TST 23 GFX_PWR_SRC BACKLITEON Adress : A9H --Contrast AAH --Backlight SMBCLK1 17,23,31 SMBDAT1 17,23,31 INVERTER_CBL_DET# 23 LCD_BAK# 23 PWM_VADJ 23 LCD_CBL_DET# 23 2 1 20439-040E C122 *47P_NC 1 ENVDD 1 6 LCD_ACLK- 6 LCD_ACLK+ 6 2 1 1 Q30 2N7002W Q31 2N7002W 3 2 2 2 R377 *0_NC Support the new imbeded diagnostics. R353 47K 1 1 1 2 R371 *47K_NC 25 3 +3.3V_SUS 1 2 2 +3.3V_RUN C92 0.01U C479 0.01U 25 3 1 R369 *100K_NC C472 22U 1206 10 1 1 R357 47 0805 LCDVCC_ON 2 D 3 1 R365 330K 4 2 2 6 5 2 1 2 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Q37 FDC655BN 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 +LCDVCC 2 +3.3V_RUN 1 J2 +15V_ALW 50 C C123 *47P_NC 50 UMA Populate R351 for DPST implementation only. 12 12 Populate R346 for platform without DPST support. No Stuff for Discrete DSPT support due to back up plan. 4 1 ICH_USBP4+ ICH_USBP4- L7 1206 3 2 USBP4_D+ USBP4_D+PWR_SRC GFX_PWR_SRC *PLW3216S900SQ2T1_NC SJ15 40mil 48 2 *0_NC 1 R71 2 *0_NC 1 2 40mil 2 2 +3.3V_RUN 1 R70 1 R356 *10K_NC 1 B 6 BIA_PWM B BACKLITEON A A Title QUANTA COMPUTER LCD CONN & CK-SSCD 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Thursday, June 12, 2008 Rev 1A Sheet 1 18 of 53 A B C D E 4 4 +5V_RUN 2 D1 SDM10K45-7-F 1 1 2 1 2 1 2 +3.3V_RUN D28 *DA204U_NC D29 *DA204U_NC 3 D27 *DA204U_NC 3 3 Layout Note: Setting R,G,B treac impedance to 50 ohm. 60 44 6 VGA_RED L35 0603 BLM18BB750SN1D RED 6 VGA_GRN L34 0603 BLM18BB750SN1D GREEN 1 1 50 C528 *10P_NC 2 50 C527 *10P_NC 2 50 C526 *22P_NC 2 1 2 50 C524 *22P_NC 50 14 15 RP1 2.2KX2 4 2 G_DAT_DDC2_C 1 Q2 BSS138_NL 3 G_CLK_DDC2_C 2 1 G_CLK_DDC2 C2 *10P_NC 2 6 50 2 C1 *10P_NC 50 L2 BLM11A05S 1 HSYNC JVGA_HS 0603 U1 2 VGAVSYNC 3 13 25 3 1 VGAHSYNC_R 10 2 Place near U1,U3 < 200 mil 5 4 VGAVSYNC_R R2 1 10 2 L1 BLM11A05S VSYNC JVGA_VS 50 50 1 C3 10P 50 2 1 C7 *10P_NC 2 C8 *10P_NC 2 2 74AHCT1G125GW 1 0603 1 6 PAD 2 4 0.1U 2 1 10 T2 +3.3V_RUN R1 1 74AHCT1G125GW C5 1 1 U2 2 VGAHSYNC M_SEN#_R 12 1K 1 5 SDM10K45-7-F 6 G_DAT_DDC2 50 11 2 R7 2 1 2 C6 0.01U 4 2 6 2 1 Q1 BSS138_NL CRT_VCC M_ID2# T1 JVGA1 070546FR015S205ZL 3 1 2 3 1 RP2 2.2KX2 D2 PAD CRT_VCC +3.3V_RUN +5V_RUN C529 *10P_NC 6 1 7 2 8 3 9 4 10 5 17 1 1 1 C525 *22P_NC 1 R394 150/F 2 R388 150/F 2 R393 150/F 1 2 2 3 BLUE BLM18BB750SN1D 1 L36 0603 VGA_BLU 2 6 16 +5V_CRT_REF C4 10P 50 Place near JVGA1 connector < 200 mil 1 1 Title QUANTA COMPUTER CRT&TV CONN A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Friday, May 30, 2008 Rev 1A Sheet E 19 of 53 A B C 2 D E +3.3V_R5C847 1 C149 *0.01U_NC 25 1 +3.3V_R5C847 2 U10A 1 1 2 C199 0.47U 0603 10 2 C198 0.01U 25 2 1 C175 0.01U 25 2 2 1 AS CLOSE AS POSSIBLE TO DEVICE TERMINALS VCC_RIN1 VCC_RIN2 VCC_ROUT1 VCC_ROUT2 1 +3.3V_R5C847 GBRST# should be asserted only when system power supply is on. 2 1 2 R152 100K C210 1U 0603 10 PCI Bus 12,25 PCI_PAR 12,25 PCI_C_BE3# 12,25 PCI_C_BE2# 12,25 PCI_C_BE1# 12,25 PCI_C_BE0# 3 PCI_AD17 R153 100 12 PCI_REQ0# 12 PCI_GNT0# 12,25 PCI_FRAME# 12,25 PCI_IRDY# 12,25 PCI_TRDY# 12,25 PCI_DEVSEL# 12,25 PCI_STOP# 12,25 PCI_PERR# 12,25 PCI_SERR# 12,25 PCI_RST# 17 CLK_PCI_PCCARD 13,23,25 CLKRUN# 12,23,25 ICH_PME# M2 M1 N5 N4 N2 N1 P5 P4 R4 R2 R1 T2 T1 U2 U1 V1 T7 V7 W7 R8 T8 V8 W8 R9 V9 W9 T11 V11 W11 T12 V12 W12 V6 P2 W2 W6 T9 P1 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 PAR C/BE3# C/BE2# C/BE1# C/BE0# IDSEL 1 C171 0.01U 25 2 1 C195 0.01U 25 2 1 2 1 C196 *0.01U_NC 25 2 2 C139 10U 0603 6.3 2 A4 J1 J5 K5 E9 R10 T10 V10 W10 L15 M19 A9 B9 D9 D14 A15 B15 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 AGND1 AGND2 AGND3 AGND4 AGND5 AGND6 PCI / OTHER PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 PowerOnReset for VccCore C194 0.01U 25 1 C169 *0.47U_NC 0603 10 12,25 PCI_AD[31..0] 2 C162 *0.01U_NC 25 2 VCC_MD PCI Bus +3.3V_R5C847 SJ12 1 2 F5 J19 K19 G5 VCC_3V1 VCC_3V2 VCC_3V3 VCC_3V4 25 R6 E13 L1 E14 +3.3V_RUN Place the power caps close to the relation pins. VCC_PCI1 VCC_PCI2 VCC_PCI3 2 25 W3 R11 R12 C190 *0.01U_NC 1 1 C186 0.01U 2 10 1 C183 0.1U 2 1 C153 10U 0603 6.3 2 2 1 AS CLOSE AS POSSIBLE TO DEVICE TERMINALS 2 +3.3V_R5C847 1 C174 0.01U 25 2 C164 0.01U 25 1 1 C144 10U 0603 6.3 2 2 1 2 1 AS CLOSE AS POSSIBLE TO DEVICE TERMINALS F4 R7 TEST1 TEST2 HWSPND# SPKROUT# REQ# GNT# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# G2 L4 K1 GBRST# PCIRST# PCICLK L5 G4 CLKRUN# PME#/RI_OUT# F2 CB_HWSPND# R155 1 2 10K +3.3V_R5C847 F1 CB_SPKROUT# R154 2 1 100K +3.3V_R5C847 Memory Stick Enable XD Card Enable Serial ROM disable SD Card Enable MMC Card Enable UDIO5 G1 UDIO4 H5 R158 2 1 10K UDIO3 H4 R156 2 1 10K UDIO2 H2 +3.3V_R5C847 3 H1 UDIO1 M4 M5 V3 V4 W4 T5 V5 W5 T6 2 J4 UDIO0/SRIRQ# IRQ_SERIRQ 13,23,25 PCI Bus J2 PCI_PIRQA# 12 INTB# K4 PCI_PIRQC# 12 INTC# K2 PCI_PIRQB# 12 NC0 L2 INTA# 1394 Interrupt Media card Interrupt CoreLogic CLOCKRUN# The ICH schematics need to include a pull-up resistor to implement CLKRUN#, and the ICH schematics must have a pull-down, or constantly drive thesignal low, in order to disable CLKRUN#. R5C847-V10_1 CLK_PCI_PCCARD 4 1 4 2 1 2 R151 *22_NC A B C197 *1P_NC 50 Title QUANTA COMPUTER 5 IN 1 CONTROLLER C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 Rev 1A Sheet E 20 of 53 A B C D E U10B C1 NC1 D1 NC2 E1 +CBS_VPP NC3 1 C2 NC4 D2 NC5 E2 NC6 E4 CARDBUS / MEDIA CARD NC7 1 SD/XD/MS_CLK_R 1 2 R143 *22_NC 2 2 C163 *10P_NC 50 E8 MDIO19 D8 XD_D3/MS_D3/SD_D3 XD_D2/MS_D2/SD_D2 XD_D1/MS_D1/SD_D1 XD_D0/MS_D0/SD_D0 XD_RE#/CLK SD/XD/MS_CLK_R XD_WE#/MS_BS/SD_CMD MDIO18 B8 A8 E7 D7 B7 A7 E6 D6 MDIO17 MDIO16 MDIO15 MDIO14 MDIO13 MDIO12 MDIO11 MDIO10 B6 CDATA14 CDATA2 CADR18 VPPEN0 VPPEN1 VCC5EN# VCC3EN# MDIO07 B5 MDIO06 A5 MDIO05 B4 MDIO04 XD_R/B#/SD_WP# B3 MDIO03 A3 MDIO02 A2 SD_CDZ CD1#/CCD1# CD2#/CCD2# VS1#/CVS1 VS2#/CVS2 MDIO08 MC_PWR_CTRL_0 3 REG#/CCBE3# CADR12/CCBE2# CADR8/CCBE1# CE1#/CCBE0# CADR13/CPAR CADR23/CFRAME# CADR22/CTRDY# CADR15/CIRDY# CADR20/CSTOP# CADR21/CDEVSEL# CADR19 CADR14/CPERR# WAIT#/CSERR# INPACK#/CREQ# WE#/CGNT# BVD1/CSTSCHG WP/CCLKRUN# CADR16/CCLK RDY/CINT# RESET/CRST# BVD2/CAUDIO MDIO09 A6 D5 PAD T34 CDATA10/CAD31 CDATA9/CAD30 CDATA1/CAD29 CDATA8/CAD28 CDATA0/CAD27 CADR0/CAD26 CADR1/CAD25 CADR2/CAD24 CADR3/CAD23 CADR4/CAD22 CADR5/CAD21 CADR6/CAD20 CADR25/CAD19 CADR7/CAD18 CADR24/CAD17 CADR17/CAD16 IOWR#/CAD15 CADR9/CAD14 IORD#/CAD13 CADR11/CAD12 OE#/CAD11 CE2#/CAD10 CADR10/CAD9 CDATA15/CAD8 CDATA7/CAD7 CDATA13/CAD6 CDATA6/CAD5 CDATA12/CAD4 CDATA5/CAD3 CDATA11/CAD2 CDATA4/CAD1 CDATA3/CAD0 USBDP USBDM B19 C18 D19 D18 E19 E16 F18 F15 G18 G15 H18 H15 J18 J16 J15 P16 P19 R19 P18 R18 T19 T18 U19 U18 W17 V17 W16 V16 W15 V15 T15 R14 CBS_CAD31 CBS_CAD30 CBS_CAD29 CBS_CAD28 CBS_CAD27 CBS_CAD26 CBS_CAD25 CBS_CAD24 CBS_CAD23 CBS_CAD22 CBS_CAD21 CBS_CAD20 CBS_CAD19 CBS_CAD18 CBS_CAD17 CBS_CAD16 CBS_CAD15 CBS_CAD14 CBS_CAD13 CBS_CAD12 CBS_CAD11 CBS_CAD10 CBS_CAD9 CBS_CAD8 CBS_CAD7 CBS_CAD6 CBS_CAD5 CBS_CAD4 CBS_CAD3 CBS_CAD2 CBS_CAD1 CBS_CAD0 F16 K18 P15 V19 N15 K16 L16 K15 M16 L18 N19 N18 G16 G19 M15 E18 A18 L19 M18 H19 F19 CBS_CC/BE3# CBS_CC/BE2# CBS_CC/BE1# CBS_CC/BE0# CBS_CPAR CBS_CFRAME# CBS_CTRDY# CBS_CIRDY# CBS_CSTOP# CBS_CDEVSEL# CBS_CBLOCK# CBS_CPERR# CBS_CSERR# CBS_CREQ# CBS_CGNT# CBS_CSTSCHG CBS_CCLKRUN# CBS_CCLK_R CBS_CINT# CBS_CRST# CBS_CAUDIO T14 D15 R16 H16 CBS_CCD1# CBS_CCD2# CBS_CVS1 CBS_CVS2 W18 C19 N16 V13 W13 R13 T13 CBS_CDATA14 CBS_CDATA2 CBS_CDATA18 VPPEN0 VPPEN1 VCC5EN# VCC3EN# SJ6 1 1 2 R130 1 CBS_CCLK 2 2 100K +CBS_VCC CON1 CBS_CAD0 CBS_CAD1 CBS_CAD3 CBS_CAD5 CBS_CAD7 CBS_CC/BE0# CBS_CAD9 CBS_CAD11 CBS_CAD12 CBS_CAD14 CBS_CC/BE1# CBS_CPAR CBS_CPERR# CBS_CGNT# CBS_CINT# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 CBS_CCLK CBS_CIRDY# CBS_CC/BE2# CBS_CAD18 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD29 CBS_CDATA2 CBS_CCLKRUN# 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 CBS_CCD1# CBS_CAD2 CBS_CAD4 CBS_CAD6 CBS_CDATA14 CBS_CAD8 CBS_CAD10 CBS_CVS1 CBS_CAD13 CBS_CAD15 CBS_CAD16 CBS_CDATA18 CBS_CBLOCK# CBS_CSTOP# CBS_CDEVSEL# 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 CBS_CTRDY# CBS_CFRAME# CBS_CAD17 CBS_CAD19 CBS_CVS2 CBS_CRST# CBS_CSERR# CBS_CREQ# CBS_CC/BE3# CBS_CAUDIO CBS_CSTSCHG CBS_CAD28 CBS_CAD30 CBS_CAD31 CBS_CCD2# 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 GND D3-CAD0 D4-CAD1 D5-CAD3 D6-CAD5 D7-CAD7 CE1#-CC/BE0# A10-CAD9 OE#-CAD11 A11-CAD12 A9-CAD14 A8-CC/BE1# A13-CPAR A14-CPERR# WE/PGM-CGNT# RDY/BSY-IRQ/CIN VCC MH1 MH2 MH3 MH4 H1 H2 85 86 87 88 89 90 1 VPP1 A16-CCLK A15-CIRDY# A12-CC/BE2# A7-CAD18 A6-CAD20 A5-CAD21 A4-CAD22 A3-CAD23 A2-CAD24 A1-CAD25 A0-CAD26 D0-CAD27 D1-CAD29 D2-RFU WP/IOIS16-CCLKR GND GND CD1#-CCD1# D11-CAD2 D12-CAD4 D13-CAD6 D14-RFU D15-CAD8 CE2#-CAD10 VS1#/RFSH-CVS1 RSVD-CAD13 RSVD-CAD15 A17-CAD16 A18-RFU A19-CBLOCK# A20-CSTOP# A21-CDEVSEL# VCC 2 GNDPAD1 GNDPAD2 GNDPAD3 GNDPAD4 GNDPAD5 GNDPAD6 GNDPAD7 GNDPAD8 GNDPAD9 GNDPAD10 GNDPAD11 GNDPAD12 GNDPAD13 GNDPAD14 GNDPAD15 GNDPAD16 VPP2/VPP2 A22-CTRDY# A23-CFRAME# A24-CAD17 A25-CAD19 VS2#/RSVD-CVS2 RESET-CRST WAIT#-CSERR# RSVD-CREQ# REG#-CC/BE3# BVD2/SP-CAUDIO# BVD1-STSCHG D8-CAD28 D9-CAD30 D10-CAD31 CD2#-CCD2# GND V14 W14 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 WZ21131-G2-8F 3 pci-1ca4a501-tc-a2-68p MDIO01 B1 MDIO00 R5C847-V10_1 3 4 SD_CDZ 4 DAT3 VSS2 CMD DAT0 9 C/D DAT1 10 XD_D1/MS_D1/SD_D1 W/P 11 XD_R/B#/SD_WP# GND_PAD4 GND_PAD3 GND_PAD2 GND_PAD1 12 13 14 15 VSS1 6 VDD 3 MC_PWR_CTRL_0# 2 1 11 3VIN 13 15 5VIN1 5VIN2 4 3 2 1 30mil 47 54 B R386 150K VCCOUT1 VCCOUT2 VCCOUT3 VPPOUT 9 12 14 +CBS_VPP 8 1 NC1 EN1 EN0 VCC3EN VCC5EN /FLAG GND C104 *0.1U_NC 10 5 C96 0.1U 10 16 4 +3.3V_RUN_CARD 2 9 2 NC3 NC2 R5531V002-E2-FA MC_PWR_CTRL_0 SDSR09-A0-0015 A VPPEN1 VPPEN0 VCC3EN# VCC5EN# Q44 AO3403 1 5 1 C110 1U 0603 10 10 7 6 8 XD_D0/MS_D0/SD_D0 +5V_RUN 3 2 XD_WE#/MS_BS/SD_CMD XD_RE#/CLK CLK 2 XD_D3/MS_D3/SD_D3 R387 10K 2N7002W 7 DAT2 2 U7 2 1 C100 1U 0603 10 1 Q46 CON3 XD_D2/MS_D2/SD_D2 1 1 2 1 +3.3V_RUN_CARD 2 1 +3.3V_RUN C94 0.1U 10 +CBS_VCC +3.3V_R5C847 2 3 IN 1 CARD READER (SD/MMC/SDIO) C97 0.1U 10 2 2 1 +CBS_VCC C513 2.2U 0603 6.3 Title QUANTA COMPUTER IEEE 1394 C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Monday, June 23, 2008 Rev 1A Sheet E 21 of 53 2 3 4 5 6 AS CLOSE AS POSSIBLE TO R5C847 AVCC_PHY3V AVCC_PHY3V D11 CPS AVCC_PHY1 AVCC_PHY2 AVCC_PHY3 AVCC_PHY4 10 1 C120 C118 *1000P_NC 1000P 50 50 2 1 C119 0.1U 2 1 1 C116 *0.1U_NC 10 E10 E11 A17 B17 AS CLOSE AS POSSIBLE TO R5C847 A C152 0.33U 16 TPBIAS0 C135 22P 50 R5C847_XI A16 R142 56.2/F XI Y3 24.576MHz 0.01U 2 R390 2 1 0 IEEE1394_TPBN0 TPBP0 R391 2 1 0 IEEE1394_TPBP0 TPAN0 R392 2 1 0 IEEE1394_TPAN0 TPAP0 R389 2 1 0 IEEE1394_TPAP0 A 25 56 53 CN10 22P 50 XO FIL0 B14 REXT A13 TPBN0 TPBP0 B13 TPBP0 *NCM900E-TR_NC TPAN0 A12 TPAN0 TPAP0 B12 TPAP0 4 B1- B_1- 5 IEEE1394_TPBN0 4 4 3 B1+ B_1+ 6 IEEE1394_TPBP0 3 3 2 A0- A_0- 7 IEEE1394_TPAN0 2 2 1 A0+ EB1 A_0+ 8 IEEE1394_TPAP0 1 1 5 6 7 8 A14 TPBN0 1 R5C847_XO B16 IEEE1394 C129 C160 1 R140 56.2/F TPBN0 0603 TPBIAS0 D12 8 +3.3V_R5C847 2 C115 10U 0603 6.3 2 2 U10C 2 1 2 7 L11 BLM18PG181SN1D 5 6 7 8 1 R135 1 C184 2 10K/F 2 R5C847_REXT 0.01U 25 R5C847_VREF 1 D13 VREF E12 NC8 C143 2 R138 56.2/F 270P 1 25 CON-1394 R136 56.2/F R137 5.11K/F B B Circuit area : As small as possible. *TPA/TPA#,TPB/TPB# pair trace : As close as possible. *TPA/TPA#,TPB/TPB# pair trace : Same length electrically. *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out). C NC9 D10 NC10 A11 NC11 B11 NC12 A10 NC13 B10 C R5C847-V10_1 D D QUANTA COMPUTER Title ExpressCard/SmartCard 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 7 Rev 1A Sheet 22 of 8 53 R169 2 6,12,26,34 PLTRST# 1 17 CLK_PCI_8512 11,26 LPC_LFRAME# 11,26 LPC_LAD0 11,26 LPC_LAD1 11,26 LPC_LAD2 11,26 LPC_LAD3 13,20,25 CLKRUN# 13,20,25 IRQ_SERIRQ 13 SIO_EXT_SMI# 13 SIO_EXT_SCI# 11 SIO_A20GATE 18 LCD_TST C D13 D12 D11 2 2 2 D14 2 WRST# 93 5 SDMK0340L-7-F 1 15 SDMK0340L-7-F 1 23 SDMK0340L-7-F 126 1 17 SDMK0340L-7-F 1 SIO_RCIN# 18 LCD_BAK# 4 14 16 32 NB_MUTE# 12,20,25 ICH_PME# 19 20 36,42 SMBCLK0 36,42 SMBDAT0 17,18,31 SMBCLK1 17,18,31 SMBDAT1 CLKRUN/GPH0/ID0 SERIRQ ECSMI/GPD4 ECSCI/GPD3 GA20/GPB5 LPCPD/WUI6/GPE6 IR/UART L80HLAT/GPE0 L80LLAT/WUI7/GPE7 2 2 66 67 68 69 70 71 72 73 DAC0/GPJ0 DAC1/GPJ1 DAC2/GPJ2 DAC3/GPJ3 DAC4/GPJ4 DAC5/GPJ5 76 77 78 79 80 81 PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 PWM7/GPA7 24 25 28 29 30 31 32 34 TACH0/GPD6 TACH1/GPD7 47 48 TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6 120 124 RXD/GPB0 TXD/GPB1 CRX0/GPC0 CTX0/GPB2 CRX1/GPH1/ID1 CTX1/GPH2/ID2 108 109 119 123 94 95 FLFRAME/GPG2/LF FLRST/GPG0/TM FLAD3/GPG6 100 106 104 FLAD2/SO FLAD1/SI FLAD0/SCE FLCLK 103 102 101 105 +3.3V_ALW 1 1 R162 *0_NC C205 0.1U 3 RP13 1 2.2KX2 SMBDAT1 SMBCLK1 4 2 3 RP14 1 10KX2 SIO_SLP_S5# 10 R115 SMCLK0/GPB3 SMDAT0/GPB4 SMBCLK1 SMBDAT1 115 116 SMCLK1/GPC1 SMDAT1/GPC2 SMBUS LPC/FWH FLASH SMCLK2/GPF6 SMDAT2/GPF7 HWPG 35 IMVP6_PROCHOT# 39 SUS_ON HWPG IMVP_VR_ON PAD T20 LCD_CBL_DET# INVERTER_CBL_DET# ADP_OC SIO_SLP_S5# LCD_CBL_DET# 18 INVERTER_CBL_DET# 18 PBAT_PRES# 42 R133 R112 R109 ADP_OC PAD T138 IINP 2 SDMK0340L-7-F BREATH_LED# 30 BAT2_LED# 30 FAN1_PWM 31 PWM_VADJ 18 BAT1_LED# 30 SCROLL_LED# 30 CAP_LED# 30 BEEP 32 KB_BACKLITE_EN +3.3V_RUN ICH_RSMRST# 13 SIO_PWRBTN# 13 LCD_CBL_DET# R113 2 INVERTER_CBL_DET# R114 2 LCD_BAK# R161 2 46 R163 EC_FLASH_SPI_CLK_R 2 FAN1_TACH 31 PANEL_BKEN 6 1 480 14 PS2CLK1/GPF2 PS2DAT1/GPF3 B 29 CLK_TP_SIO 29 DAT_TP_SIO 89 90 PS2CLK2/GPF4 PS2DAT2/GPF5 +3.3V_ALW 2 128 ITE8512_XTAL2 2 1 ITE8512IX_JX WRST# +3.3V_ALW L12 LID_SW# 30 PAD T36 0603 L13 32KHz Clock. VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 74 75 AVCC AVSS C128 0.1U ITE8512_XTAL2 IMVP_VR_ON 39 SUS_ON SUS_ON +3.3V_ALW PAD T31 ICH_CL_PWROK EC_FLASH_SPI_CLK_R 6,13 EC_FLASH_SPI_DO 24 EC_FLASH_SPI_DIN 24 EC_FLASH_SPI_CS# 24 2 R111 10K R124 10K CLK_PCI_8512 2 R110 *10K_NC R128 *10K_NC B R118 *10K_NC USB_SIDE_EN# 27 BT_RADIO_DIS# 26 PAD T37 RING/PWRFAIL/LPCRST/GPB7 112 PAD T133 PWRSW/GPE4 125 33 SIO_SLP_S3# 13 ACAV_IN 36 CHIP_ID 1: Santa Rosa 0: Dimondville MAIN_PWR_SW# 30 LCDVCC_TST_EN 18 BID0 0 0 1 1 0 0 12 VM8x/VM9x SSI (X00) PT (X01) ST (X02) QT (A00) (A01) BID1 0 1 0 1 0 1 ITE8512IX_JX A C208 0.1U 0603 R164 *0_NC 1 2 C193 18P 50 Title C213 2.2P QUANTA COMPUTER Ultra I/O Controller ECE5028 ITE8512IX pin12 connect to GND. ITE8512JX pin12 connect to 0.1uF, 1uF. 50 5 CHIP_ID 1 R160 10 2 3 1 ITE8512_XTAL1 C203 32.768KHZ 18P 50 42 2 W1 4 13 BID0 BID1 PAD T136 PAD T139 CHIP_ID BID0 BID1 USB_SIDE_EN# 11 R122 10K Dimondville GINT/GPD5 9 30 1 A PS_ID Board ID Straps 38,40,41 ITE8502E LQFP128-16X16-4-FX2 0603 BLM11A05S C RUN_ON_1 35 18 21 35 RI1/WUI0/GPD0 RI2/WUI1/GPD1 WUI5/GPE5 10 C531 27P 50 PAD T18 82 83 84 96 97 98 99 107 24 Place R163, C531 close to U11 PAD T32 PAD T134 PAD T132 CK32KE 1 12 27 49 91 113 122 BLM11A05S 2 C228 1U 0603 10 GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6 GPG1/ID7 CK32K 1 2 2 SDMK0340L-7-F 1 3,6,31,40 THERM_STP# EGAD/GPE1 EGCS/GPE2 EGCLK/GPE3 GPIO ITE8512_XTAL1 R172 100K D15 1 EGPC PS/2 EC_FLASH_SPI_CLK 2 87 88 1 10K 1 10K 1 10K 41 1 35 RESET_OUT# 30 NUM_LED# 13,35,39 IMVP_PWRGD 36 10 SIO_EXT_WAKE# 13 PAD T135 PAD T137 2 PS2CLK0/GPF0 PS2DAT0/GPF1 PAD 100K 100K *100K_NC SIO_SLP_S5# 13 1 85 86 T8 *100K_NC D HWPG 1 D10 4 2 Santa Rosa 110 111 117 118 LPC KBRST/GPB6 WRST PWUREQ/GPC7 SMBCLK0 SMBDAT0 T33 PAD T35 PAD ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/GPI5 ADC6/GPI6 ADC7/GPI7 ADC/DAC PWM 26 50 92 114 121 127 SMBDAT0 SMBCLK0 2 G_Thermal and Media button LPCRST/WUI4/GPD2 LPCCLK LFRAME LAD0 LAD1 LAD2 LAD3 11 Charge and BAT CLK, LCD and Thermal 22 13 6 10 9 8 7 VSTBY1 VSTBY2 VSTBY3 VSTBY4 VSTBY5 VSTBY6 KEYBOARD 0 +3.3V_ALW 2 2 11,32 ICH_AZ_CODEC_RST# *0_NC 1 KSI7 KSI6 KSI5 KSI4 KSI3/SLIN KSI2/INT KSI1/AFD KSI0/STB 2 1 R168 2 65 64 63 62 61 60 59 58 +3.3V_RUN 1 1 KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0 16 1 2 Place these caps close to ITE8512. ITE8512E LQFP-128L 3 11 2 10 KSO17/GPC5 KSO16/GPC3 KSO15 KSO14 KSO13 KSO12/SLCT KSO11/ERR KSO10/PE KSO9/BUSY KSO8/ACK KSO7/PD7 KSO6/PD6 KSO5/PD5 KSO4/PD4 KSO3/PD3 KSO2/PD2 KSO1/PD1 KSO0/PD0 VBAT1 VCC 1 +RTC_CELL 2 C156 0.1U 10 2 SJ1 1 10 C172 *0.1U_NC 1 C125 0.1U 1 1 10 2 2 2 1 2 1 C154 0.1U 2 2 C207 10U 0603 6.3 57 56 55 54 53 52 51 46 45 44 43 42 41 40 39 38 37 36 KSO16 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0 +3.3V_ALW D 3 U11 KSO[0..16] KSI[0..7] 1 4 29 29 1 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Saturday, July 19, 2008 Rev 1A Sheet 1 23 of 53 5 4 3 2 16Mbit (2M Byte), SPI 1 RTC BATTERY +RTC_CELL +3.3V_ALW +PWR_SRC +3.3V_ALW U18 U6 2 15 2 15 2 15 1 6 5 2 CE# SCK SI SO VDD 8 HOLD# 7 3 WP# VSS 4 R84 10K 1 SST25VF016B-50-4C-S2AF IN 1 GND SHDN 5 1 OUT 5/3# *MAX1615EUK-T+_NC D C393 *1U_NC 0805 25 BT1 C395 1U 0603 10 C93 0.1U 2 1 1 1 2 1 2 +RTC_1 1 D21 R307 SDMK0340L-7-F 2 1K +RTC 1 2 HS8202E RTC-BATTERY 1 R88 R95 R85 2 EC_FLASH_SPI_CS# EC_FLASH_SPI_CLK EC_FLASH_SPI_DIN EC_FLASH_SPI_DO 2 2 23 23 23 23 2 1 R90 10K C392 2.2U 0603 6.3 2 1 D 3 4 1 1 2 D20 SDMK0340L-7-F +3.3V_ALW 10 C C B B A A Title QUANTA COMPUTER Ultra I/O Controller ECE5028 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 Rev 1A Sheet 1 24 of 53 1 2 3 4 +3.3V_RUN 5 6 7 8 +3.3V_RUN CN8 1 TIP RING 2 A A PCI_AD23 PCI_AD21 PCI_AD19 PCI_AD17 B 12,20 PCI_C_BE2# 12,20 PCI_IRDY# 13,20,23 CLKRUN# 12,20 PCI_SERR# 12,20 PCI_PERR# 12,20 PCI_C_BE1# PCI_AD14 PCI_AD12 PCI_AD10 PCI_AD8 PCI_AD7 PCI_AD5 PCI_AD3 +5V_RUN PCI_AD1 C T147 +5V_RUN DEBUG_ENABLE PCI_GNT1# 12 ICH_PME# 12,20,23 PCI_AD30 PCI_AD28 PCI_AD26 PCI_AD24 2 *100_NC PCI_AD20 R37 PCI_AD22 PCI_AD20 PCI_AD18 PCI_AD16 PCI_PAR 12,20 B PCI_FRAME# 12,20 PCI_TRDY# 12,20 PCI_STOP# 12,20 +3.3V_RUN 2 PCI_DEVSEL# 12,20 PCI_AD15 PCI_AD13 PCI_AD11 PCI_AD9 C42 *0.1U_NC 0603 50 C39 *0.1U_NC 0603 50 1 12,20 PCI_C_BE3# PCI_RST# 12,20 C40 *0.1U_NC 0603 50 2 PCI_AD27 PCI_AD25 12 1 PCI_AD31 PCI_AD29 PCI_PIRQD# +3.3V_SUS 2 12 PCI_REQ1# +5V_RUN 1 17,26 CLK_LPC_DEBUG 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 CLK_LPC_DEBUG_R 8PMJ-1 8PMJ-2 8PMJ-4 8PMJ-5 LED2_YELP LED2_YELN RESERVED3 5V_2 INTA# USBD3.3VAUX1 RST# 3.3V_5 GNT# GND9 PME# BT_ACTIVE AD30 3.3V_6 AD28 AD26 AD24 IDSEL GND10 AD22 AD20 PAR AD18 AD16 GND11 FRAME# TRDY# STOP# 3.3V_7 DEVSEL# GND12 AD15 AD13 AD11 GND13 AD9 C/BE0# 3.3V_8 AD6 AD4 AD2 AD0 RESERVED5 RESERVED6 GND14 M66EN AC_SDATA_OUT AC_CODEC_ID0# AC_RESET# RESERVED7 GND15 SYS_AUDIO_IN SYS_AUDIO_IN GND AUDIO_GND3 MCPIACT# 3.3VAUX2 1 12 PCI_PIRQE# 8 8PMJ-3 8PMJ-6 8PMJ-7 8PMJ-8 LED1_GRNP LED1_GRNN CHSGND INTB# 3.3V_1 USBD+ GND0 CLK GND1 REQ# 3.3V_2 AD31 AD29 GND2 AD27 AD25 WLAN_ACTIVE C/BE3# AD23 GND3 AD21 AD19 GND4 AD17 C/BE2# IRDY# 3.3V_3 CLKRUN# SERR# GND5 PERR# C/BE1# AD14 GND6 AD12 AD10 GND7 AD8 AD7 3.3V_4 AD5 RESERVED1 AD3 5V_1 AD1 GND8 AC_SYNC AC_SDATA_IN AC_BIT_CLK AC_CODEC_ID1# MOD_AUDIO_MON AUDIO_GND1 SYS_AUDIO_OUT SYS_AUDIO_OUT GND AUDIO_GND2 RESERVED2 VCC5A 2 12,20 PCI_AD[31..0] 16 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 C41 *0.1U_NC 0603 50 PCI_C_BE0# 12,20 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 IRQ_SERIRQ 13,20,23 C +3.3V_SUS *MINI-PCI_AMP_NC Place the debug connector on HDD area 2 1 CLK_LPC_DEBUG_R C51 *0.1U_NC 10 D D QUANTA COMPUTER Title Debug Port (Mini PCI) 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Saturday, July 19, 2008 7 Rev 1A Sheet 25 of 8 53 1 2 TH1 H-C217D122P2 3 4 5 6 TH2 H-C217D122P2 +3.3V_WLAN L19 USBP8 DUSBP8 D+ 1 4 +3.3V_WLAN +3.3V_WLAN A +1.5V_RUN J6 PCI-Express TX and RX direct to connector 12 12 2 *0_NC 2 *0_NC PCIE_RX2PCIE_RX2+ PCIE_TX2PCIE_TX2+ 13 PCIE_MCARD1_DET# T123 PAD T122 PAD T129 PAD Non-iAMT 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 Reserved Reserved GND PERn0 PERp0 GND GND PETn0 PETp0 GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved +3.3V GND +1.5V Reserved Reserved Reserved Reserved Reserved 2 4 6 8 10 12 14 16 GND Reserved PERST# +3.3Vaux GND +1.5V SMB_CLK SMB_DATA GND USB_DUSB_D+ GND LED_WWAN# LED_WLAN# LED_WPAN# +1.5V GND +3.3V 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 0 R252 R250 R249 R248 R247 SJ2 1 1 1 1 1 1 1 2 2 2 2 2 2 2 *0_NC *0_NC *0_NC *0_NC *0_NC LPC_LFRAME# 11,23 LPC_LAD3 11,23 LPC_LAD2 11,23 LPC_LAD1 11,23 LPC_LAD0 11,23 PLTRST# 6,12,23,34 WLAN_RADIO_OFF# R229 *0_NC 1 2 RP21 2.2KX2 SB_WLAN_PCIE_RST# 12 +3.3V_WLAN WLAN_SMBCLK WLAN_SMBDATA WLAN_SMBCLK 1 LED_WLAN_OUT# 30 10 10 2 *0_NC Q12 *2N7002W_NC 1 3 10 + C419 4.7U 0805 10 2 C426 *0.047U_NC B ICH_SMBDATA 13 2 *0_NC Suport for WoW 1 10 2 1 C428 0.1U 1 C415 *0.047U_NC 2 1 2 1 C411 0.1U 10 2 2 C427 0.047U ICH_SMBCLK 13 +3.3V_WLAN 1 R207 2 1 1 10 2 2 C416 0.047U 3 1 R221 USB_MCARD1_DET# 13 WLAN_SMBDATA 2 50 Q11 *2N7002W_NC USBP8 DUSBP8 D+ +3.3V_WLAN 1 2 1 +1.5V_RUN A +3.3V_WLAN MINI1CLK_REQ# C412 220P 2 FOR DEBUG CARD 1827680-1 B 2 2 R317 1 R318 1 WAKE# Reserved Reserved CLKREQ# GND REFCLKREFCLK+ GND 0 1 R217 2 FOR DEBUG CARD 6,12,23,34 PLTRST# 17,25 CLK_LPC_DEBUG 12 12 ICH_USBP8- 12 ICH_USBP8+ 12 4 2 17 MINI1CLK_REQ# 1 3 5 7 9 11 13 15 1 R216 3 1 COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE_MINI MINI1CLK_REQ# 17 CLK_PCIE_MINI1# 17 CLK_PCIE_MINI1 2 3 *PLW3216S900SQ2T1_NC 1206 For MiniCard nut use. 13,34 PCIE_WAKE# 8 +3.3V_RUN 1 1 MiniCard WLAN connector 7 C443 *330U/6.3V_NC 7343 6.3 WLAN_RADIO_OFF# 2 1 WLAN_RADIO_DIS# 13 D16 SDMK0340L-7-F 1 R241 Place caps close to connector. 2 *0_NC Prevent backdrive when WoW is enabled. C C Bluetooth +3.3V_RUN J4 COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE_MINI 2 R303 10K C382 100P 50 R302 10K 2 C384 0.1U 10 1 2 1 ICH_USBP6- 12 2 2 D 1 1 87213-1000G 2 4 6 8 10 C383 33P 50 1 GND Activity LED 3.3V(Logic) COEX2 Radio Enable/Disable# COEX1 RSVD USBUSB+ GND 2 23 BT_RADIO_DIS# PAD T97 12 ICH_USBP6+ 1 1 3 5 7 9 C381 *0.1U_NC 10 D QUANTA COMPUTER Title MDC CONN. 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 7 Rev 1A Sheet 26 of 8 53 1 2 3 4 5 6 7 External USB PORT hookup reference. Your design may need more or less external ports and may be mapped differently 60 8 52 +USB_SIDE_PWR JUSB1 1 12 12 4 1 ICH_USBP0ICH_USBP0+ 1206 3 2 USBP0 DUSBP0 D+ 2 L4 USBP0 DUSBP0 D+ C520 0.1U 10 1 2 3 4 A_VCC A_DATAA_DATA+ A_GND 5 6 7 8 B_VCC B_DATAB_DATA+ B_GND SHIELD1 SHIELD2 SHIELD3 SHIELD4 *PLW3216S900SQ2T1_NC 0 1 R10 0 2 1 1 R9 2 2 A +USB_SIDE_PWR USBP1 DUSBP1 D+ C521 0.1U 10 9 10 11 12 A UB1112C-KB2VM-7F 12 12 4 1 ICH_USBP1ICH_USBP1+ L3 1206 3 2 USBP1 DUSBP1 D+ *PLW3216S900SQ2T1_NC 1 R11 0 2 1 R12 0 2 Platforms should put in PADS for the USB chokes if they have the room. Chokes should be NOPOP. B B Place ESD diodes as close as USB connector. ESD1 USBP0 D- Place one 150uF cap by each USB connector. +5V_SUS 1 2 3 USBP0 D+ U24 3 EN1# 1 OUT1 OC1# 7 8 +USB_SIDE_PWR OUT2 OC2# 6 5 10 EN2# +USB_SIDE_PWR USBP1 D+ +USB_SIDE_PWR USBP1 DC USB_OC0_1# 12 1 C516 0.1U 6 5 4 *SRV05-4.TCT_NC GND TPS2062DR 2 C510 *10U_NC 0805 10 2 2 4 6 5 4 1 IN 1 1 23 USB_SIDE_EN# 2 + C515 *150U_NC 7343 6.3 2 C 1 2 3 + C514 150U 7343 6.3 Each channel is 1A D D QUANTA COMPUTER Title SERIAL PORT & USB 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 27 of 8 53 1 2 3 4 SATA HDD Connector. 5 6 7 8 SATA ODD Connector. CON2 FOR VM8x GND1 RXP RXN GND2 TXN TXP GND3 A 3.3V_0 3.3V_1 3.3V_2 GND4 GND5 GND6 5V_0 5V_1 5V_2 GND7 RSVD GND8 12V_0 12V_1 12V_2 CN3 1 2 3 4 5 6 7 SATA_TX0+ 11 SATA_TX0- 11 SATA_RXN0_C C243 SATA_RXP0_C C244 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 2 2 1 3900P 25 1 3900P 25 S1 51 14 14 SATA_RX0- 11 SATA_RX0+ 11 S7 P1 +3.3V_RUN 15 GND1 TXP TXN GND2 RXN RXP GND3 1 2 3 4 5 6 7 DP +5V +5V MD GND GND 8 9 10 11 12 13 15 SATA_TX1+ 11 SATA_TX1- 11 SATA_RXN1_C_VM8 SATA_RXP1_C_VM8 C398 C397 1 3900P 25 1 3900P 25 2 2 SATA_RX1- 11 SATA_RX1+ 11 A +5V_MOD P6 SATA_ODD_CON +5V_HDD FOR VM9x FOX_LD2822H-SA9L6 +3.3V_RUN C236 *10U/10V/0805_NC B C227 *1U_10V_0603_NC C225 *0.1U/16V_NC C231 *0.1U/16V_NC C239 *1000P/50V_NC B Place caps close to connector. +5V_HDD 2 C240 10U/10V/0805 *1U/10V/0603_NC 0.1U/16V C223 C229 Place caps close to connector. C234 +5V_MOD *0.1U/16V_NC 0.1U/16V 1000P/50V +5V_RUN +5V_HDD +5V_MOD 2 Place caps close to connector. SJ13 1 2 C534 *1U_NC 10 0603 2 C401 *1U_NC 10 0603 C400 0.1U 16 0402 C399 1000P 50 0402 R176 100K C533 *0.1U_NC 16 0402 C532 *1000P_NC 50 0402 Place caps close to CN3. 1 2 2 R308 *100K_NC 2 1 C C226 4.7U 0603 6.3 C402 10U 0805 10 1 2 1 1 +5V_RUN SJ14 2 1 57 1 C233 2 2 C217 C place close to CN1 D D QUANTA COMPUTER Title SATA (HDD&CD_ROM) 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 7 Rev 1A Sheet 28 of 8 53 1 2 3 4 5 37 +5V_RUN 6 7 8 KEYBOARD CONNECTOR Touch Pad 1 3 +5V_RUN 0603 BLM18AG601SN1D L30 0603 BLM18AG601SN1D TP_CLK TP_DATA 1 2 2 2 1 50 C450 10P 1 2 3 4 1 2 3 4 10 10 23 KSI[0..7] KSO10 KSO11 KSO9 KSO14 KSO13 KSO15 KSO16 KSO12 KSO0 KSO2 KSO1 KSO3 KSO8 KSO6 KSO7 KSO4 KSO5 KSI0 KSI3 KSI1 KSI5 KSI2 KSI4 KSI6 KSI7 C448 10P 50 50 50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GND1 C442 0.1U KSO[0..16] 88513-0401 1 C449 10P 2 CLK_TP_SIO DAT_TP_SIO C447 10P C453 *0.047U_NC 23 A GND2 L29 1 23 23 1 19 JP2 2 35 2 4 35 2 1 4.7KX2 A JKB1 11 2 RP42 HRS FH28D-50(25)SB-1SH(86) B B C126 *100P_NC 50 KSI7 8 6 4 2 CP5 *100PX4_NC 7 KSO12 5 KSO16 3 KSO15 1 KSO13 1206 8 6 4 2 8 6 4 2 C 50 8 6 4 2 50 50 8 6 4 2 50 CP4 *100PX4_NC 7 KSO3 5 KSO1 3 KSO2 1 KSO0 1206 CP3 *100PX4_NC 7 KSI6 5 KSI4 3 KSI2 1 KSI5 1206 CP6 *100PX4_NC 7 KSO14 5 KSO9 3 KSO11 1 KSO10 1206 CP1 *100PX4_NC 7 KSO4 5 KSO7 3 KSO6 1 KSO8 1206 8 6 4 2 50 CP2 *100PX4_NC 7 KSI1 5 KSI3 3 KSI0 1 KSO5 1206 C 50 100P CAPS CLOSE TO JKB1 D D QUANTA COMPUTER Title TOUCH PAD, BULE TOOTH & FIR 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 7 Rev 1A Sheet 29 of 8 53 A B C D Keyboard LED E Power & Suspend. +3.3V_RUN +3.3V_RUN +5V_RUN +5V_SUS 1 3 2 10K 3 Q26 2N7002W 5 R384 100K JP3 CAP_LED_L NUM_LED_L SCROLL_LED_L POWER_ SW_IN0# NUM_LED_L 1 23 BREATH_LED# 1 2 3 4 5 6 3 2 Q41 2N7002W U23 TC7SZ04FU(T5L,F,T) BREATH_PWRLED 4 4 3 1 NUM_LED# Dash board connector 2 2 Q27 DDTA114YUA-7-F 47K 4 23 +5V_SUS +3.3V_SUS 20 R346 100K GB1RF061-1200-8F +3.3V_RUN +3.3V_RUN +5V_RUN Power Switch 2 Q25 DDTA114YUA-7-F 47K 23 +3.3V_ALW 1 R345 100K 1 CAP_LED# 3 R237 100K 2 WLAN 10K 3 Q24 2N7002W R234 23 MAIN_PWR_SW# 10K POWER_ SW_IN0# C289 1U 0603 10 CAP_LED_L 3 3 +3.3V_RUN +3.3V_RUN +5V_RUN +3.3V_RUN +5V_RUN LID Switch R347 100K +3.3V_ALW Q22 DDTA114YUA-7-F 2 +3.3V_RUN 1 R344 100K 47K 1 23 SCROLL_LED# 3 1 26 LED_WLAN_OUT# Q29 DDTA114YUA-7-F 3 2 R20 100K 10K Q20 2N7002W 2 3 2 1 47K 23 R21 LID_SW# 10K 2 3 Q28 2N7002W J1 10K 1 2 C13 1U 0603 10 LED_WLAN_OUT#_R SCROLL_LED_L 3800N-E002-NNN HDD activity LED. 2 +3.3V_RUN +3.3V_RUN +5V_RUN Battery fault +3.3V_ALW 2 1 1 R343 100K 47K 11 1 SATA_ACT# 3 Q23 DDTA114YUA-7-F 2 HDD_LED R22 220 D4 19-217BHCYL2M2TY3T 2 1 HDD_LED_R 47K 10K 23 HDD_LED LED_WLAN_OUT#_R R28 220 2 BAT2_LED# 10K D6 19-217BHCYL2M2TY3T 1 LED_WLAN_OUT 2 RBREATH_PWR_LED D3 19-217BHCYL2M2TY3T 2 1 3 3 Q21 2N7002W Q45 DDTA114YUA-7-F BAT2_LED BREATH_PWRLED +3.3V_ALW Battery in charging +3.3V_ALW 4 1 2 Q43 DDTA114YUA-7-F 47K 23 BAT1_LED# 220 4 R403 100K 1 R17 +5V_ALW2 1 3 1 R26 220 RBAT2_LED 3 1 BAT1_LED R27 220 RBAT1_LED 4 2 2 10K Title 3 Q48 2N7002W D5 BAT2_LED LTST-C195TBKFKT-5A QUANTA COMPUTER SWITCH, KEYBOARD & LED BAT1_LED A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Tuesday, June 10, 2008 Rev 1A Sheet E 30 of 53 2 3 4 FAN1_PWM FAN1_PWM 1 23 C492 2.2U 0805 10 2 2 1 A 1 J7 FAN1_VOUT 2 0805 4 3 2 1 C486 0.1U 7 8 *DA204U_NC D26 4 3 2 1 3 R372 0 1 6 +5V_RUN D24 *SSM34PT_NC 1 2 +5V_RUN 5 2 1 MLX_532610471 A FAN1_PWM 10 R375 +5V_RUN 4.7K FAN1_TACH 23 +3.3V_RUN Place under CPU 10/20mils REM_DIODE1_P 1 2 2 1 U21 50 REM_DIODE1_N 50 1 VDD SCL 10 THERM_SCL 2 DP1 SDA 9 THERM_SDA 3 DN1 ALERT# 8 THERM_ALERT#_C 4 DP2 SYS_SHDN# 7 GND 6 B H_THERMDA 2 H_THERMDC H_THERMDC 5 50 2 3 C490 2200P C527, C525 should close to thermal IC DN2 1 THERM_ALERT# 3 THERM_ALERT# 13 B close to ICH Q34 2N7002W EMC1423-1-AIZL-TR 1 H_THERMDA 1 3 2 Q40 MMST3904-7-F C491 2200P 2 1 3 +3.3V_RUN C501 *2200P_NC SYS_SHDN# C488 0.1U THERM_STP# 3,6,23,40 +3.3V_RUN 1 10 2 3 R354 1M C470 0.1U +3.3V_RUN 1 2 2 Q33 2N7002W Q32 2N7002W 1 1 3 2 10 +3.3V_RUN OTP 85 degree C 17,18,23 SMBDAT1 3 C 1 R366 10K R367 10K +3.3V_RUN 2 Q35 2N7002W 2 2 1 C R364 1 2 10K/F THERM_ALERT#_C R363 1 2 6.8K/F SYS_SHDN# THERM_SDA 1 2 +3.3V_RUN 17,18,23 SMBCLK1 3 Q36 2N7002W THERM_SCL 1 D D QUANTA COMPUTER Title FAN & THERMAL 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 31 of 8 53 3 2 1U 10 0603 AMP_BYPASS 10 BYPASS 2 3 NC EPAD GND1 GND2 GND3 GND4 12 21 1 11 13 20 GAIN0 GAIN1 2 +3.3V_RUN SPK_SHUTDOWN# 2 1 1 R306 100K R301 100K TPA6017A2/FAN7031/LM4874 C385 100P 50 2 15.6dB 1 1 21.6dB R305 *100K_NC D19 2 SDMK0340L-7-F 1 HP_JD D18 2 SDMK0340L-7-F EAPD# 1 A NB_MUTE# 23 R300 5.1K/F JACK SENSE SENSEA Q17 2N7002W 1 1 2 AUD_AMP_GAIN0 AUD_AMP_GAIN1 19 0 R298 20K/F 5 R336 *22_NC 10K 1 BEEP1 R296 *2.2K_NC BEEP 23 2 SPKR 13 12 +AVDDA L22 BLM21PG600SN1D PC_BEEP 48 45 46 47 26 40 36 S/PDIF GPIO2 GPIO1 EAPD#/GPIO0 CX20561-12Z Not support digital MIC CX20561-13Z support digital MIC 34 18 18 GPIO2 GPIO1 EAPD# 2 10K 2 *10K_NC *0_NC DMIC_CLK_R *0_NC DMIC_DATA_R R399 R400 DMIC_CLK DMIC_DATA 1 2 DMIC_CLOCK DMIC_1/2 omit omit -12dB 10K omit -18dB omit 10K 48 10K CX20561-12Z DIGITAL 2 MICBIASB PORTB_L PORTB_R 19 14 15 MICBIASC PORTC_L PORTC_R 18 16 17 PORTD_L PORTD_R 27 28 1 1 1 AUD_HP_L AUD_HP_R MIC_L MIC_R 20 21 MONO STEREO_L STEREO_R 29 30 31 SENSEA 13 VREF 24 FLY_P FLY_N 39 37 VREF_LO VREF_HI RESERVED_32 RESERVED_33 22 23 32 33 BLM18BD601SN1D AUD_HP_L1 BLM18BD601SN1D AUD_HP_R1 CN7 1 7 2 8 6 3 4 5 JAS233L-B10H9-7F 0603 L28 ANALOG 3 L27 1 AUD_MIC1_VREFO AUD_MIC_L AUD_MIC_R 2 0603 AUD_MIC1_VREFO_L 2 34 35 C417 100P 50 1 PORTA_L PORTA_R C444 100P 50 C HP JACK R230 1 R284 4.7K AUD_LINE_OUT_L AUD_LINE_OUT_R SENSEA C339 1 0805 1 C358 0805 2.2U R273 AUD_MIC_L1 2 10 AUD_MIC_R1 2 2.2U R280 10 29 L24.L25,L30,L31, FB_600ohm+-25%_100MHz _200mA_0.6ohm DC 100 AUD_MIC_L2 L24 C368 1 10 4 C364 1U 0603 10 AUD_MIC_L3 BLM18BD601SN1D 0603 AUD_MIC_R2 100 L26 AUD_MIC_R3 BLM18BD601SN1D 0603 VREF 1 -6dB 1 GPIO2 100K 2 +3.3V_RUN HP_JD 25 38 10K 34 DVSS_7 DVSS_41 GPIO1 0dB 48 7 41 GAIN 36 AVSS_25 AVSS_38 D PC Beep GAIN CONTROL MIC JACK 2 1U 0603 C366 10U 0805 10 2 12 *0_NC C410 100P 50 C414 100P 50 1 AUD_PC_BEEP R397 2 DIB_P DIB_N AUD_MIC_R3 1 43 42 2 R278 1 R274 1 9 4 3 44 DIBP_SYS DIBN_SYS 0 0 *0_NC MIC_JD CN11 1 7 2 8 6 3 4 5 *JAS233L-B10H9-7F_NC C376 *10U_NC 0805 10 100K 2 +3.3V_RUN MIC_JD CN5 1 7 2 8 6 3 4 5 JAS233L-B10H9-7F MIC JACK 49 1 R281 R286 DIBP_HS DIBN_HS AZ_CODEC_SDIN0 BIT_CLK SYNC SDATA_IN SDATA_OUT *0_NC R186 1 2 2 33 RESET# 6 10 8 5 R396 29 1 33 33 AZ_CODEC_BITCLK C373 1U 0603 10 AUD_MIC_L3 C372 0.1U 10 2 11 ICH_AZ_CODEC_BITCLK 11 ICH_AZ_CODEC_SYNC R266 1 11 ICH_AZ_CODEC_SDIN0 11 ICH_AZ_CODEC_SDOUT 2 C377 10U 0805 10 2 11,23 ICH_AZ_CODEC_RST# 11 AVDD_26 AVDD_40 AVEE C 3 1 29 AVEE VDD_IO DVDD_1-8 DVDD_3-3 DVDD_44 2 C332 0.1U 10 U15 C365 0.1U 10 2 2 +3V_DVDD C396 0.1U 10 2 1 C331 0.1U 10 1 C408 10U 0805 10 1 DVDD_1.8V C354 0.1U 10 2 1 2 1 2 C330 1U 0603 10 HP_JD R398 +3.3V_RUN C328 10U 0805 10 Q16 2N7002W 18 +3V_DVDD 2 B U16 74LVC1G86GW AUDIO CODEC +3.3V_RUN L20 BLM21PG600SN1D C379 *1000P_NC 0603 3 C369 *1P_NC 50 1 4 2 Q15 2N7002W 2 Put R336, C269 close to U15 pin 6, reserve for EMI 2 B 1U R297 2BEEP2 2 10 1 1 2 C378 AUD_PC_BEEP 1 0603 MIC_JD 2 1 2 1 45 3 2 AZ_CODEC_BITCLK 2 50 C380 0.1U 16 2 1 1 +AVDDA Close to U1 R299 5.1K/F +AVDDA 1 1 C371 1 SHUTDOWN 10dB 1 2 LINRIN- 1 2 5 17 1 LINRIN- 85204-0200L C387 100P 50 6dB 0 2 0603 0603 C388 100P 50 GAIN 0 R293 100K AUD_AMP_GAIN0 AUD_AMP_GAIN1 GAIN1 0 1 2 1U 10 2 1U 10 4 8 2 LIN+ RIN+ C394 1 C390 1 LOUT+ LOUT- 1 9 7 2 1 1 LIN+ RIN+ 18 14 1 0603 0603 ROUT+ ROUT- AUD_SPK_R1 AUD_SPK_R2 2 PVDD1 PVDD2 VDD 2 1U 10 2 1U 10 1 GAIN0 R294 *100K_NC J5 U17 C446 1 C530 1 C374 100P 50 Speakers conn +5V_SPK_AMP 6 15 16 8 2 AUD_LINE_OUT_L AUD_LINE_OUT_R 7 2 28 C386 *0.1U_NC 10 13 A 6 +5V_SPK_AMP 1 1 C375 0.1U 10 2 1 2 1 2 C389 0.47U 0603 10 5 AUDIO AMPLIFIER TPA6017A2 2 C391 10U 0805 10 4 2 2 +5V_SPK_AMP L23 BLM21PG600SN1D 3 1 +5V_RUN C367 0.1U 10 D EMI Request R402 R401 R304 R261 R295 R334 R185 C362 1U 0603 10 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 2 2 2 2 2 2 2 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0603 0603 0603 0603 0603 0603 0603 QUANTA COMPUTER Title Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 7 Rev 1A Sheet 32 of 8 53 1 2 3 4 5 6 7 8 Revision History REV 0 A Description Date Initial Release April 26, 2005 A 4 MJ2 3800N-E002-NNN CNXT-FI-S2P-HF MFB2 RAC1_RING RING_1 2 1 300A/0.3A CNXT-0603 MU1 MBR1 MMBD3004S CNXT-SOT23AC_A_C RAC 12 4 RAC1 MR3 6.81MB/F CNXT-0805 ML1 AGND_LSD TEST 1 2 4 3 MRV1 TB3100M CNXT-DO214AA MJ1 *127214FS002G200ZO CNXT-127214FS2G2ZO 2 1 *600C/F CNXT-ICM-1206 TAC 5 TAC1 MR1 6.81MB/F CNXT-0805 MBR2 MMBD3004S CNXT-SOT23AC_A_C B MFB1 TAC1_TIP 32 32 DIBN_HS DIBP_HS DIBN_HS DIBP_HS DIBN 16 DIBN EIC 11 EIC MC11 TIP_1 300A/0.3A CNXT-0603 0.1U/10V/X CNXT-0402 MC8 470P/3KV/1808 CNXT-502R29N MC9 470P/3KV/1808 CNXT-502R29N MJ3 *127214FS002G200ZO CNXT-127214FS2G2ZO 2 1 B AGND_LSD MC10 PWR+ MC5 0.1U/10V/X CNXT-0402 MC12 150P/50V/O CNXT-0402 MT1 DIBN_HS DIBP_HS 2 1 2 1 MJ6 MC13 150P/50V/O CNXT-0402 1 2 3 4 *127214FS004G200ZO CNXT-HDR_1x4F_1-27_5-78x2 AVDD MRa 2 AVDD RXI 6 RXI 0.01UA/100V/X CNXT-0603 AGND_LSD MC7 *470P/3KV/1808 CNXT-502S43W GND Just need to populate at CN side. MCa RX1_1 MR2 237KB CNXT-0805 BRIDGE_CC <DC_WORK_VOLT> MC1 0.047UF 250V CNXT-1206 MR9 280 CNXT-1206 32 MR5 280 CNXT-1206 MR6 280 CNXT-1206 MR10 280 CNXT-1206 BRIDGE_CC2 AGND_LSD 4 DIBP 14 835-00252F CNXT-5328R41-003 DVDD GND MJ5 1 DIBP EIO DVDD MC4 0.1U/10V/X CNXT-0402 1 2 9 EIF TXO 8 TXO TXF 7 TXF 100R CNXT-0402 MQ1 MMBTA42 CNXT-SOT23CBE MQ2 MMBTA42 CNXT-SOT23CBE MR8 *47A CNXT-0603 <RESIST_TOL> QBASE MQ3 MMBTA42 CNXT-SOT23CBE MQ4 MMBTA42 CNXT-SOT23CBE MR11 3.01/F CNXT-0402 MR12 3.01/F CNXT-0402 C 13 EP MR4 110A CNXT-0603 <RESIST_TOL> CX20548-S CNXT-MLF2_16P_0-65_4-0X4-0 VC_LSD 17 AGND_LSD MR13 10 EIF GPIO VC *127214FS002G200ZO CNXT-HDR_1X2F_1-27_3-24X2 GND 3 C MRa and MCa must be placed near pin 6 (RXI) and there should be no vias on the(RXI)net. 3 MC6 47P/50V/O CNXT-0402 *127214FS002G200ZO CNXT-HDR_1X2F_1-27_3-24X2 PWR MC3 0.1U/10V/X CNXT-0402 GND MJ4 15 MR7 9.1C CNXT-1206 AGND_LSD MC2 0.1U/10V/X CNXT-0402 AGND_LSD D D QUANTA COMPUTER Title 1 2 3 4 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 5 6 Size Document Number VM9/VM8 Date: Friday, May 30, 2008 7 Rev 1A Sheet 33 8 of 53 A B C D E TRANSFORM +1.2V_LOM R30 TST1284-V LF 25MHz C35 27P 50 NPO +3.3V_LAN U3 EECS EESK EEDI EEDO LOM_ACTLED_YEL# LAN_XTAL2 LAN_XTAL1 MX4- 13 LAN_MX0- 11 TD4+ MX4+ 14 LAN_MX0+ TDCT 10 TCT4 MCT4 15 TXCT0 MDI1- 9 TD3- MX3- 16 LAN_MX1- MDI1+ 8 TD3+ MX3+ 17 LAN_MX1+ 18 TXCT1 0.01U 25 7 6 R29 3.6K +3.3V_LAN 5 +3.3V_LAN 4 3 2 1 +1.2V_LOM EESK EEDI EEDO EECS R24 1K +3.3V_LAN ISOLATEB PCIE_TX6+/GLAN_TX+ PCIE_TX6-/GLAN_TXCLK_PCIE_LOM CLK_PCIE_LOM# EVDD12 LAN_PCIETXDP LAN_PCIETXDN MCT3 TD2- MX2- TD2+ MX2+ TCT2 MCT2 TD1- MX1- TD1+ MX1+ TCT1 MCT1 R23 MDI0- C15 6.8P 50 MDI0+ C14 6.8P 50 MDI1- C17 6.8P 50 MDI1+ C16 6.8P 50 19 21 C11 1000P 3K NPO 1808 22 23 24 3 CLK_PCIE_LOM CLK_PCIE_LOM# LED0 Tx/Rx Action 17 CLK_PCIE_LOM 17 CLK_PCIE_LOM# LED1/EESK LINK100 LED2/EEDI LINK10 RJ-45 Connector 14 CON5 C22 C23 12 PCIE_RX6+/GLAN_RX+ 12 PCIE_RX6-/GLAN_RX- 0.1U 0.1U LAN_PCIETXDP LAN_PCIETXDN 10 10 LOM_ACTLED_YEL# PCIE_TX6+/GLAN_TX+ PCIE_TX6-/GLAN_TX- 12 PCIE_TX6+/GLAN_TX+ 12 PCIE_TX6-/GLAN_TX- R405 330 12 +3.3V_LAN 13 +3.3V_LAN EESK LAN_MX1- 2 Q50 DDTA114YUA-7-F LAN_MX1+ LAN_MX0LAN_MX0+ 10K 8 7 6 5 4 3 2 1 2006123-3 Y LED_YN LED_YP 8 7 6 5 4 3 2 1 LED_GND 3 10 O R406 C430 and 243 are for U2 EVDD12 pin 19. C18 1U 0603 10 47K C21 0.1U 10 EEDI LED_GN/AP LED_GP/AN 2 G Q51 DDTA114YUA-7-F 2 10K 3 Remove R211 & R212 in RTL8102EL application. C223, C224, C233, C235 are for U2 VDD33 pins-- 1, 29, 37 and 40. 9 11 +3.3V_LAN EVDD12 C37 0.1U 10 330 1 *0_NC 0603 2 2 C38 22U 0805 4 R383 1 CTRL12A_R1 1 CTRL12A 1 75/F PLTRST# 6,12,23,26 PCIE_WAKE# 13,26 Note 1: The Trace length between L210 and 8111DL's Pin 1 must be within 0.5 cm. C5 and C8 to L210 must be within 0.5cm. Refer to Layout guide for more detail. Change L210 to 0 ohm in RTL8102EL application. 4 R5 15K 47K 2 TXCT0_R 75/F 20 1 +1.2V_LOM TCT3 R4 U25 +3.3V_RUN 1 AVDD33 DVDD12 MDIP0 LED1/EESK MDIN0 LED2/EEDI NC/FB12 LED3/EEDO MDIP1 EECS MDIN1 GND RTL8102EL/8111DL DVDD12 GND NC/MDIP2 VDD33 NC/MDIN2 ISOLATEB DVDD12/AVDD12 PERSTB NC/MDIP3 LANWAKEB NC/MDIN3 CLKREQB 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 +1.2V_LOM C24 0.1U 10 C512 TD4- MDI0+ 0.01U 25 14 15 MDI1+ MDI1- 8 7 6 5 VCC NC1 NC2 GND 12 TDCT DVDD12 GND HSIP HSIN REFCLK_P REFCLK_N EVDD12 HSOP HSON EGND NC/SMCLK NC/SMDATA MDI0+ MDI0- CS SK DI DO MDI0- 48 47 46 45 44 43 42 41 40 39 38 37 CTRL12A 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 C511 93LC46B-I/SNG VCTRL12A/SROUT12 GND RSET VCTR12DVDDSR NC/VDDSR NC/ENSWREG CKTAL2 CKTAL1 NC/AVDD33 NC/LV_PLL LED0 VDD33 +3.3V_LAN 1 10K 2 2 1 2 LAN_XTAL2 2 2.49K U4 3 1 C36 27P 50 NPO RSET 4 R382 31 Y1 LAN_XTAL1 C32 22U 0805 4 CHSGND1 CHSGND2 2 13 C30 0.1U 10 R407 330 R31 *0_NC 0603 +3.3V_LAN +3.3V_SUS 1 1 2 2 1 C244, C246, C248, C252, C253 are for U2 VDD12 pins-- 10, 13, 30, 36, 39. SJ11 2 QUANTA COMPUTER +1.2V_LOM C31 *0.1U_NC 10 C27 0.1U 10 C33 0.1U 10 C25 0.1U 10 C34 0.1U 10 C29 0.1U 10 C26 0.1U 10 C20 0.1U 10 C28 0.1U 10 A FinePrint pdfFactory Pro trial B version http://www.fineprint.com C PDF created with Title LAN D Size Document Number VM9/VM8 Date: Saturday, July 19, 2008 Rev 1A Sheet E 34 of 53 1 2 3 4 5 +3.3V_ALW 6 7 8 +3.3V_SUS 2 2 15 64 R144 *0_NC A 1 1 A R107 0 5 U8 13,23,39 IMVP_PWRGD 2 23 RESET_OUT# 1 74AHC1G08GW 4 6,13 3 1 ICH_PWRGD R25 1K 2 11 Keep Away from high speed buses 47 +3.3V_ALW B 14 B 38 1.25V_RUN_PWRGD 1 37 1.5V_RUN_PWRGD 2 U12A 3 U12C SN74AHC08PW 9 8 10 U12B 40 3V_ALW_PWRGD 4 40 5V_ALW_PWRGD 5 SN74AHC08PW 6 SN74AHC08PW U12D 12 11 HWPG 13 37 1.05V_RUN_PWRGD HWPG 23 SN74AHC08PW C C +3.3V_ALW 64 5 U9 74AHC1G08GW 38 1.8V_SUS_PWRGD 2 23 RUN_ON_1 1 RUN_ON 37,38,41 3 4 R106 1 2 *0_NC R108 2 1 *10K_NC RUN_ON R145 2 1 *10K_NC RUN_ON_1 D D QUANTA COMPUTER Title System Reset Circuit 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Friday, July 25, 2008 7 Rev 1A Sheet 35 of 8 53 A B C D E +PWR_SRC Id=9.6A@Vgs=10V PQ11 1 PQ5 2/12 2 4 PC96 *2200P_NC 2 100K CSSP 1 PR59 +DC_IN_SS PR87 1 470K 3 2 10K PC95 *0.1U_NC 0603 50 CSSN 50 1 PR60 1 4 2 4 2 1 3 4 1 1 3 1 1 2 3 2 8 7 6 5 +DC_IN_SS +DC_IN_SS 8 7 6 5 PR77 0.01/3720 1 FDS4435BZ 2 1 FDS4435BZ 1 2 3 1 2 PQ1 2N7002W +DC_IN_SS 5 CCI PC60 0.01U 25 1 1 PC61 0.01U 25 2 1 2 1 2 PC62 0.01U 25 2 PC65 0.1U 10 2 1 1 PR52 8.45K/F 2 3 18 CSIP 15 REF 8731REF PC59 1U 0603 10 5 6 7 8 SI4800BDY-T1-E3 PR49 1 2 1 2 1 +VCHGR 1 PC54 220P 50 TABLE 1 PU4 SJ10 1 PC49 10U 1206 25 Max Charging current setting 2.64A CSIN MAX8731A 1 42 50 PC63 0.1U 10 PC48 10U 1206 25 2 1 PC50 *10U_NC 1206 25 2 50 PC46 0.1U 0603 50 1 1 50 2 50 PC44 2200P 2 PC51 1000P PC47 1000P 2 2 1 PC45 3300P 2 2 1 4 1 1 PR43 2.2 0805 1+VCHGR 100 55 2 1 2 3 PR42 0.01/3720 PL2 10UH +-20%,4.4A (TPC104DR-100M) CHG_CS 1 1 2 2 3 3 4 4 1 2 2 6 CSIP 16 FBSB CCS 3 1 17 CSIN FBSA 4 RDS(ON)=30m ohm SI4800BDY-T1-E3 1 PR50 10K CCV 1 2 6 IINP 50 RDS(ON)=30m ohm PQ9 19 GND 8 12 IINP 1 7 IINP PC52 3300P 1 2 1 DLO 20 DLO PGND Adress : 12H 23 SCL SDA BATSEL DAC 10 9 14 PR44 0603 23 LX LX GNDA_CHG DHI 24 DHI 23,42 SMBCLK0 23,42 SMBDAT0 SMBUS Address 12 26 VCC VDD PC99 10U 1206 25 PQ8 5 6 7 8 ACOK 2 0.1U 50 2 2 1 PC66 0603 PC55 1U 2 1 0603 10 4 1 2 3 11 +3.3V_ALW PR54 15.8K/F PC53 0.1U 0603 50 2 2 ACAV_IN PC98 *10U_NC 1206 25 PC58 1U 2 1 0603 10 PR46 33/F 0603 21 LDO 1 23 13 LDO 25 BST BST 2 1 27 28 ACIN 1 DCIN PC91 0.1U 0603 50 2 2 2 PR53 10K/F 1 8731_ACIN GND 1 2 22 1 2 1 PC57 0.01U 25 PC97 2200P 50 CSSN 1 2 CSSP LDO 2 2 PR47 49.9K/F PC56 1U 0805 25 2 1 PR48 365K/F 1 2 LDO PD5 SDM10K45-7-F 2 ADAPTER(W) 2 GNDA_CHG 3 TRIP CURRENT (A) 65 3.17 90 4.43 130 6.43 150 7.43 200 230 9.75 11.28 (see note3) 4 4 Title QUANTA COMPUTER Charger (ISL88731) A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 Rev 1A Sheet E 36 of 53 5 4 3 2 1 +PWR_SRC 3 5 6 7 8 PC33 *0.1U_NC 1 2 51117DH PC109 0.1U 50 0603 PC108 2200P 50 2 1 1 2 1 PC107 10U 1206 25 PQ13 4 D IRF8707TRPBF 1 2 3 D PC106 10U 1206 25 2 2 1 +DC_PWR_SRC TON DRVH 13 3 VOUT LL 12 4 V5FILT TRIP 11 5 VFB V5DRV 10 2 4 1 1 2 33 PR95 8.2K/F/0603 1 PR35 12.1K PC34 1U/10V/0603 SJ9 1 PR36 2.2/F/0603 2 TPS51117RGYR 15 PC31 *0.1U_NC 50 0603 51117DL 2 8 PC36 2200p/50V 1 9 PGND 33 2 DRVL GND +1.05V_VCCP_P 55 PQ12 IRF8736TRPBF 1 2 3 PGOOD 7 14 PL3 1.3UH/SIL105RA-1R3)/14A 1 2 51117LX +5V_ALW2 2 2 1 +3.3V_SUS 0.1U 50 0603 2 6 1 2 1 PC32 1U/10V/0603 Rds-on=17.5mOhm 1 2 2 2 1 51117_FB 35 1.05V_RUN_PWRGD PR31 100K 14 1 VBST 5 6 7 8 2 EN_PSV EPAD 1 PR30 300/0603 +5V_ALW2 1 1 +1.05V_VCCP_P +1.05V_VCCP PC35 PU2 35,38,41 RUN_ON 2 + PC110 220U PC112 47P 50 UMA Max current(TDC)->12.1A OCP->17.54A Freq=300KHZ C Rds-on=6.8mOhm C 51117_FB PR29 2 PC111 0.1U 50 0603 1 33 237K/F 0603 PR96 20.5K/F/0603 1 +3.3V_SUS PR151 100K (22) PU8 RT9018B 1 POK GND 2 VEN ADJ 3 VIN VO 4 VPP NC 35 1.5V_RUN_PWRGD +5V_ALW2 +1.5V_RUN_P 9 PR149 *100K_NC 2 +1.8V_SUS 9 35,38,41 RUN_ON Max current(TDC)->1.56A 8 7 6 5 PR148 PC165 0.1U 25 0603 1 PC163 0.1U 25 0603 PC164 0.1U 25 0603 R1 1.5V_ ADJ 0.8V 2 49.9K/F PC162 1U 0805 10 B +1.5V_RUN 1 2 B PC166 10U 0805 4 55 PR147 56K Vout =0.8(1+R1/R2) =1.5V R2 A Title A QUANTA COMPUTER 1.05_VCCP & 1.5V_RUN 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Thursday, June 12, 2008 Rev 1A Sheet 37 1 of 53 5 4 3 2 1 D D 15 +PWR_SRC *0_NC 5 6 7 8 Rds-on=17.5mOhm PQ7 IRF8707TRPBF 4 1 PR51 *2.2/F_NC 0603 PC84 2200P 50 PC72 0.1U 50 0603 2 FL6 HI1206T161R-10(160,6A) 1 2 PC73 10U 1206 25 PC74 10U 1206 25 1 PC70 0.1U 25 0603 2 PC75 0.1U 25 0603 1 S5_1.8V 2 S3_1.8V 1 +DC2_PWR_SRC 2 PR74 4 5 3 DIS_MODE 6 7 2 1 V_DDR_MCH_REF 5VIN 8 PC85 0.033U 0603 25 9 10 DRVH VTT VBST VTTSNS LL GND DRVL VTTGND PGND MODE S3 VTTREF S5 COMP VDDSNS V5IN PGOOD VDDQSET CS PC89 2 50 18 1 0.1U 0603 +1.8V_LX 17 +1.8V_DL 20 11 S3_1.8V 12 S5_1.8V PR75 5VIN 14 RUN_ON 20K/F (24) SUS_ON 4 15 +1.8V_SUS_P 1 PR56 61 PR58 2.2/F 0603 14 PC80 0.1U 25 0603 (25) + PC87 *220U/2.5V/ESR15_NC + PC82 220U/2.5V/ESR15 55 35 UMA Max current(TDC)->8.987A OCP->12.83A Freq=400KHZ 1 50 PC83 *0.1U_NC +5V_ALW2 50 0603 +1.8V_SUS PC77 2200P 50 +3.3V_ALW PC86 *1000P_NC Rds-on=13mOhm PR78 16.9K 2 21 22 23 24 25 26 27 1 2 DIS_MODE +1.8V_SUS_P 23,40,41 5 2 PR76 1 100K 13 35,37,41 PQ4 IRF8714TRPBF C PL1 1.5uH(SIL1055RC-1R5-R) 1 2 6 16 1.8V_SUS_PWRGD FOR DDR II PC68 *2200P_NC 50 +1.8V_DH 19 1 PC90 10U 0805 10 TPS51116_8 VLDOIN 2 PC88 10U 0805 10 2 5 6 7 8 1U/10V/0603 +0.9V_DDR_VTT 1 2 3 PU5 1 C GND GND GND GND GND GND GND PC64 1 2 3 +1.8V_SUS 5VIN PC76 4.7U 0805 10 2 *0_NC B B PC81 PR72 *18P_NC *143K/F_NC 50 1 +3.3V_SUS PR40 100K 42 (22) 2 (Note 1) Current Limiting Setting : Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on) PU3 RT9018B 1 POK GND 2 VEN ADJ 3 VIN VO 4 VPP NC +5V_ALW2 Max current(TDC)->0.9A 8 7 6 5 +1.25V_RUN_P 9 PR146 *100K_NC 2 +1.8V_SUS 9 35 1.25V_RUN_PWRGD 35,37,41 RUN_ON +1.25V_RUN 1 PR73 *100K/F_NC PR38 PC39 0.1U 25 0603 PC38 0.1U 25 0603 1.25V_ ADJ 0.8V PR37 86.6K/F R1 2 PC40 0.1U 25 0603 1 49.9K/F PC41 1U 0805 10 PC37 10U 0805 4 55 Vout =0.8(1+R1/R2) =1.25V A A R2 (22) (22) Title QUANTA COMPUTER 1.8VSUS & 0.9VTT (TPS51116) 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Tuesday, June 10, 2008 Rev 1A Sheet 1 38 of 53 5 4 3 2 1 3 +PWR_SRC +CPU_PWR_SRC +3.3V_SUS 58 PWR_MON PR141 499/F 1 2 +3.3V_SUS C PC158 2 0.1U 1 PR5 2 3 147K/F 1 4 UGATE1 35 UG1 34 PH1 PMON PHASE1 RBIAS 33 PGND1 2 1 1 2 1 2 2 1 2 1 2 1 1 2 1 PC138 0.1U 50 0603 PL5 0.36uH_30A_ETQP4LR36WFC 1 PC140 2200P 50 +VCC_CORE 1 4 1 1 PC26 0.1U 50 0603 + PC24 330U 2 7343 2 PC22 1500P 50 2 2 2 4 (23) 1 2 3 PSI# 5 6 7 8 9 4 0603 PC17 0.22U 25 0603 2 PR139 4.99K/F 2 1 PC137 10U 1206 25 + PC30 330U 2 7343 1 PR19 36 BOOT1 PC11 *10U_NC 1206 25 PR25 2.2 0805 1 2 3 37 38 39 NTMFS4119NT1G 1 2 H_PSI# 2 PQ23 LG1 PC13 *10U_NC 1206 25 (23) PH1 PU1 PC136 10U 1206 25 PC16 *1500P_NC 50 VID0 VID1 40 VID2 42 43 41 VID3 VID4 VID5 44 VID6 45 VR_ON DPRSLPVR 46 47 48 PGOOD 4 4 4 4 4 4 4 5 6 7 8 9 CLK_EN# DPRSTP# 1 CLK_EN# 2 PR9 1.91K/F 3V3 GND 1 49 +3.3V_SUS 3 2 6,13 2 1 10 VID6 VID5 VID4 VID3 VID2 VID1 VID0 PC141 2200P 50 1 DPRSLPVR IMVP_VR_ON 23 PC4 0.1U PC139 0.1U 50 0603 3 2 499/F 4 1 2 3 PR14 1 UG1 2 1 5 NTMFS4707NT1G H_DPRSTP# 3,6,11 13,23,35 IMVP_PWRGD PR20 *2.2_NC 0805 PQ26 2 PR11 10 0603 D PT1 PAD 1 D PQ19 NTMFS4119NT1G +5V_SUS VSUM PR128 3.65K/F PR21 1 10K ISEN1 0603 0603 2 C 10 ISEN2 +CPU_PWR_SRC 2 PC148 0.33U 16 0603 1 2 2 1 2 2 1 1 PC152 0.1U 50 0603 PC144 2200P 50 +VCC_CORE PC21 1500P 50 PC25 0.1U 50 0603 1 + PC29 330U 2 7343 2 0.22U 2 0603 1 2 2 PR24 2.2 0805 2 PC14 1 25 (23) 1 4 (23) PC149 10U 1206 25 PL6 0.36uH_30A_ETQP4LR36WFC 1 1 4 1 2 3 0.22U ISL6266_VO 2 0603 + PC23 330U 2 7343 (23) B PR133 10 2 0603 VSUM PR127 3.65K/F PR17 1 10K ISEN2 +5V_SUS 2 PC10 0.1U 50 0603 PC12 1U 10 0603 PR125 0603 2 0603 1 ISL6266_VO 0603 SJ7 1 1 2 2 ISEN1 PR23 1 10K 2 0603 2 PC145 0.068U 16 (39) PR132 2.61K/F PR134 11K/F 2 PC147 0.22U 10 0603 1 1 Parallel 2 VSUM 1 VSSSENSE PC15 1 25 PC150 10U 1206 25 NTMFS4119NT1G 2 VCCSENSE 4 PC9 0.01U 16 PC8 10U 1206 25 10 1 2 4 1 PC5 0.01u 50 1206 25 2 LG2 PC7 *10U_NC PQ18 0603 1 50 1 PQ20 PR135 1 4.02K/F 0603 PC153 180P 2 1 2 1 1 2 PR136 1 (35) 2 0.01u 50 2 NTMFS4119NT1G PC151 2200P 50 PC19 *1500P_NC 50 PH2 25 PC146 0.1U 50 0603 2 2 1 0603 4 PC18 0.22U 25 0603 ISEN1 24 ISEN1 ISEN2 23 ISEN2 22 VDD GND 21 VIN 20 VSUM 1 1 1K B VSUM PR2 PR137 1K PC6 2 2 19 18 VO DFB DROOP 17 16 13 1000P 1 50 ISL6266_VO 1 255 1 2 PC1 2 PR1 2 PR6 1K PR22 26 NC RTN 50 FB2 UG2 27 BOOT2 UG2 2 NTMFS4707NT1G UGATE2 FB 15 97.6K/F 470P 1 1 PC156 2 COMP VSEN 11 12 1 PR18 *2.2_NC 0805 PQ25 1 PH2 28 PHASE2 14 10 50 PR138 55 58 29 PGND2 VW VDIFF 6.81K/F 1 PC154 220P 2 1 2 +CPU_PWR_SRC 0603 2 5 6 7 8 9 9 50 PR8 2 10K 2 LGATE2 OCSET PR16 1 1 2 3 1000P 1 2 SOFT 2 2.2U 10 0805 1 8 1 LG2 30 3 16 12.7K/F 31 PVCC 4 ISL6266_VO PR140 ISL6262A NTC 2 16 7 0603 1 6 PC157 0.015U 2 1 PC20 1 5 PC3 *4.02K/F_NC 1 1 *0.01U_NC PR129 ISL6266_VO 1 2 3 MAT PC2 ERTJ0EV474J Close to Phase 1 Inductor 2 LG1 32 LGATE1 5 6 7 8 9 PR3 PR142 2 *NTC_470K_NC VR_TT# 1 5 23 IMVP6_PROCHOT# 1 PR126 10K_NTC ISL6266_VO A A Close to Phase 1 Inductor Title QUANTA COMPUTER CPU_Core_2Phase (ISL6266) 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Thursday, June 12, 2008 Rev 1A Sheet 1 39 of 53 5 4 3 2 1 DC/DC +3V_ALW/+5V_SUS/+5V_ALW /+15V_ALW 1 2 ISL6237_ONLOD 2 PR112 1 Place these CAPs close to FETs PR114 150K/F 0603 390K Place these CAPs close to FETs D D 1 PR117 *0_NC 1 PC126 1U 0603 10 PR118 *0_NC 1 2 3 1 +3.3V_DL Rds-on=30mOhm 1 1 2 2 R378 100K +5V_ALW2 PC100 2 B 1 +15V_ALW 2 0.1U 50 0603 1 +15V_ALWP 2 1 0.1U 50 0603 3 5V_ALW_PWRGD 35 PC134 0.1U 50 0603 SECFB H_THERMTRIP# 3,6,23,31 +5V_ALW2 BAT54S-7-F 2 +3.3V_EN2 32 B 3V_ALW_PWRGD 35 POK1 2 PD10 1 PD11 2 PR103 39K PC129 1 1 2 1 R381 100K POK2 BAT54S-7-F 0.1U 50 0603 PC27 +5V_ALW2 1 +3.3V_ALWP +3.3V_ALWP PC124 1U 0603 10 2 (24) 330U 6.3*5.8 6.3 SJ8 1 1 Rds-on=30mOhm + PC155 0.1U 0603 50 PR119 *0_NC PQ22 SI4800BDY-T1-E3 PC128 0.1U 50 0603 PC159 2 1 4 2 +5V_ALW2 C POK2 +3.3V_EN2 +3.3V_DH PR115 1 0603 SECFB PR109 1 0603 +3.3V_ALWP 180K/F 2 5 6 7 8 PR26 1 1 2 3 MAX17020 32 31 30 29 28 27 26 25 REFIN2 ILIM2 OUT2 SKIP# PGOOD2 ON2 DH2 LX2 PL7 3.8UH +-30%,6A (TPC104DR-3R8Y) 1 2 2 PQ16 SI4800BDY-T1-E3 PC120 0.1U 50 0603 PAD PAD PAD +5V_DL 35 34 33 4 PU7 +3.3V_LX 2 POK1 +5V_EN1 2 PC115 0.1U 0603 50 3 2 1 1 330U 6.3*5.8 6.3 2 300K/F 1 + 1 PR28 8 7 6 5 2 PC116 PR107 *0_NC +5V_LX 6 42 8 7 6 5 4 3 2 1 3 2 1 PL4 3.8UH +-30%,6A (TPC104DR-3R8Y) 1 2 +5V_ALWP PAD LDOREFIN LDO VIN RTC ONLDO VCC TON REF +5V_ALWP PAD PAD PAD PAD BYP OUT1 FB1 ILIM1 PGOOD1 ON1 DH1 LX1 PAD PAD BST1 DL1 VDD SECFB AGND PGND DL2 BST2 6 C 41 40 39 38 9 10 11 12 13 14 15 16 37 36 +5V_DH 17 18 19 20 21 22 23 24 4 +3.3V_ALW Rds-on=30mOhm SI4800BDY-T1-E3 1 8 7 6 5 1 PQ17 Max current(TDC)->2.54A OCP->3.63A Freq=500KHZ PQ21 4 SI4800BDY-T1-E3 PC132 2200P 50 PC127 0.1U/10V 5 6 7 8 1U 10 0603 Rds-on=30mOhm PC133 0.1U 50 0603 PR123 *0_NC 2 1 2 PC125 2 ISL6237_ONLOD 1 +5V_SUS PC123 0.1U 50 0603 1 5 2 Max current(TDC)->4.139A OCP->5.91A Freq=400KHZ 0603 2 PC122 4.7U 25 0805 2 1 PC121 2200P 50 2 2 PC117 0.1U 50 0603 2 10 1 PR105 1 2 PC118 10U 1206 25 1 2 PC119 *10U_NC 1206 25 1 +5V_ALW2 1 1 PC130 10U 1206 25 2 1 PC131 *10U_NC 1206 25 2 2 1 +PWR_SRC 2 1 (24) PC28 *0.1U_NC 50 0603 PD9 2 1SS355 1 THERM_STP# 3,6,23,31 1 +5V_EN1 23,38,41 SUS_ON PR106 *0_NC 1 PC135 0.1U 50 0603 Pop for MAX17020 2 (65) A A Title QUANTA COMPUTER 3VALW,5V,3V, Power On 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Saturday, June 21, 2008 Rev 1A Sheet 1 40 of 53 +5V_RUN +5V_RUN TDC : 3.126A +5V_ALW2 +3.3V_ALW 3 1 2 2 +3.3V_SUS TDC : 0.18A 4 SUS_3.3V_ENABLE PC161 0.1U 0603 50 A 5 PC114 4700P 0603 50 23,38,40 SUS_ON 1 4 6 PQ15A 2N7002DW PQ29A 2N7002DW 2 1 1 PQ15B 2N7002DW 2 4 6 1 SUS_ON_3.3V# 5 2 35,37,38 RUN_ON PC113 0.1U 0603 50 PQ29B 2N7002DW 2 RUN_ON# 6 5 2 1 PR143 100K +3.3V_SUS 1 RUN_ENABLE_5V A PR145 *100K_NC PQ28 FDC655BN 3 3 2 2 PR97 100K PR144 100K 4 +3.3V_ALW 2 1 1 1 PR98 *100K_NC 2 PR99 100K 6 5 2 1 +15V_ALW 2 PQ14 FDC655BN +5V_SUS 3 +15V_ALW 5 2 +3.3V_ALW 4 1 +5V_ALW2 3 1 2 1 1 PC160 0.022U 0603 50 (65) 5 (24) (65) B B +15V_ALW +3.3V_ALW PQ27 +3.3V_RUN IRF8707TRPBF 3 2 1 4 2 1 8 7 6 5 PR130 100K 1 RUN_ENABLE_3.3V C PC143 4700P 25 1 +5V_SUS 3 2 2 Q39 *2N7002W_NC 2 1 1 1 2 Q18 *2N7002W_NC 1 SUS_ON_3.3V# +1.25V_RUN Q47 *2N7002W_NC 3 2 R174 *1K_NC 3 2 R270 *1K_NC 3 2 R320 *1K_NC 3 1 R385 *10_NC 3 2 R78 *1K_NC +0.9V_DDR_VTT 1 +1.5V_RUN 2 +3.3V_RUN 1 +5V_RUN R395 *1K_NC 1 3 2 R374 *1K_NC 3 2 R312 *30/F_NC Reserve discharge path +3.3V_SUS 1 +1.8V_SUS Reserve discharge path 1 1 2 PQ24 2N7002W 1 RUN_ON# PC142 0.1U 0603 50 2 3 2 C +3.3V_RUN TDC : 2.327A D D *2N7002W_NC 2 Q9 *2N7002W_NC 1 2 Q14 *2N7002W_NC 1 2 Q19 *2N7002W_NC 1 2 Q42 *2N7002W_NC 1 2 Q8 1 RUN_ON# Title QUANTA COMPUTER RUN POWER SW 1 2 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 4 Size Document Number VM9/VM8 Date: Tuesday, June 10, 2008 Rev 1A Sheet 5 41 of 53 A B C D E 10 0.1U 2 1 2 1 2 +3.3V_ALW PD1 *DA204U_NC 3 1 2 +VCHGR 50 36 2 PD2 *DA204U_NC 3 PD3 *DA204U_NC 3 PD4 *DA204U_NC 1 1 2 2200P 50 PC43 3 PC42 1 1 2 1 +3.3V_ALW 0603 PR93 10K JBAT1 1 2 3 4 5 6 7 8 9 PR88 1 1 PR90 SMBUS Address 16 100 1 Adress : 16H BATT1+ BATT2+ SMB_CLK SMB_DAT BATT_PRES# SYSPRES# BATT_VOLT BATT1BATT2- 2 2 100 PR92 1 1 PR94 SMBCLK0 23,36 SMBDAT0 23,36 100 2 2 100 PBAT_PRES# 23 PBAT_ALARM# 200045MR009H577ZR 65 +3.3V_ALW 1 2 1 +5V_ALW2 PD7 BAV99W 3 PR67 2.2K 3 100 2 PS_ID 23 +5V_ALW2 2 1 +5V_ALW2 1 PD6 *BAS316_NC PR70 10K 3 2 1 PR65 100K/F PC78 100P 50 2 PR66 1 1 2 DOCK_PSID_R 2 DOCK_PSID 2 PQ3 2N7002W 2 PD8 *DA204U_NC PQ2 MMST3904-7-F 1 2 PR68 *100_NC PS_ID_DISABLE# 2 PR64 15K/F 3 1 1 1 2 2 Change Value per GG updated EMI requirement on 0812 1 1 1 PC79 *100P_NC 50 2 BATTCON3_0 87438-0531-5P-L 25 PC93 0.1U 0603 50 1 1 1 PR81 10K/F 0603 PC94 0.1U 0603 50 2 PC92 0.01U 2 (8) 2 5 PR57 240K PC69 0.47U 0805 25 1 PSID 4 4 1 Adapter2- PC71 0.1U 0603 50 8 7 6 5 PC67 10U 1206 25 2 3 2 2 Adapter1- 1 Adapter2+ 1 2 3 +DCIN_JACK 2 1 +DC_IN_SS 2 FL1 BLM41PG600SN1L Adapter1+ FDS4435BZ 1 CN2 3 PQ6 +DC_IN 2 3 PRV1 *VZ0603M260APT_NC 2 (49) 1 PR62 47K 4 4 Title QUANTA COMPUTER DCIN,BATT CONNECTOR A B C PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com D Size Document Number VM9/VM8 Date: Tuesday, June 17, 2008 Rev 1A Sheet E 42 of 53 5 7 8 H10 h-c276d126p2 h-c276d126p2 A 1 H1 h-c276d126p2 h-c276d126p2 1 H4 H-C236D165P2 H-C236D165P2 6 65 H16 h-c276d126p2 h-c276d126p2 H14 h-c276d126p2 h-c276d126p2 H3 h-c276d126p2 h-c276d126p2 H9 h-c276d126p2 h-c276d126p2 1 h-c276d126p2 1 H19 NUT h-c276d126p2 1 H18 NUT 1 1 H17 h-c276d126p2 h-c276d126p2 1 H15 O-O354X197D354X197N O-O354X197D354X197N H8 h-o236x256d154x173p2 h-o236x256d154x173p2 1 27 4 1 7 26 H7 h-c236d154p2 h-c236d154p2 1 1 H5 H-C236D165P2 H-C236D165P2 1 H2 h-c276d126p2 h-c276d126p2 A 3 1 2 1 1 B B 8 H20 H-c276d110p2 H-c276d110p2 1 1 H13 h-o106x126d106x126n h-o106x126d106x126n 1 H12 h-c106d106n h-c106d106n 50 C C D D QUANTA COMPUTER Title SCREW PAD 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Monday, June 23, 2008 7 Rev 1A Sheet 43 of 8 53 5 4 3 2 1 Reserved for EMI. 40 Stitching caps for PCI bus. Stitching caps for PCI EMC. +5V_SUS +3.3V_RUN +3.3V_RUN 2 2 2 2 2 2 2 C19 4700P 25 C522 4700P 25 C517 4700P 25 C363 4700P 25 C437 4700P 25 1 C12 4700P 25 1 C57 4700P 25 1 +5V_RUN 1 +3.3V_RUN 1 +3.3V_RUN 1 +PWR_SRC 1 +CPU_PWR_SRC 2 C102 *0.1U_NC 10 +3.3V_RUN 1 1 +5V_RUN C200 *0.1U_NC 10 2 C341 *0.1U_NC 10 2 +5V_RUN 2 +5V_RUN 1 D +1.5V_RUN 1 D C438 4700P 25 +3.3V_RUN +1.05V_VCCP +5V_SUS +1.5V_RUN C C B B A A QUANTA COMPUTER Title EMI CAP 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 Rev 1A Sheet 1 44 of 53 1 2 3 4 5 6 7 8 +3.3V_SUS 2.2K A ICH8-M AJ26 ICH_SMBCLK AD19 ICH_SMBDATA 2.2K A +3.3V_RUN 7002 WLAN_SMBCLK 30 WLAN_SMBDAT 32 MINICARD-WLAN 7002 +3.3V_ALW +3.3V_RUN 100 2.2K 110 SMBCLK0 111 SMBDAT0 3 2.2K 4 100 BATTERY 10 9 CHARGER B B +3.3V_ALW 2.2K 6 5 2.2K INV +3.3V_RUN 115 SMBCLK1 116 SMBDAT1 7002 7 6 CLOCK 7002 +3.3V_ALW SIO ITE8512 2.2K +3.3V_RUN 2.2K C C +3.3V_RUN 115 SMBCLK1 116 SMBDAT1 10 7002 9 THERMAL 7002 +3.3V_RUN D 117 SMCLK2 118 SMDAT2 NO CONNECTOR D QUANTA COMPUTER Title SMBUS BLOCK 1 2 3 4 5 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 6 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 7 Rev 1A Sheet 45 of 8 53 5 4 3 2 1 VER : 1A Adapter D PWR_SRC Charger MAX8731AETI+ D Battery Intersil ISL6237IRZ-T TI TPS51116PWPRG4 LDO Intersil ISL6266AHRZ-T TI TPS51117RGYR IMVP_VR_ON 5V_ALW_ON +5V_ALW2 SUS_ON RUN_ON +1.8V_SUS +15V_ALW +3.3V_ALW +5V_ALW +1.8V_SUS MAXIM MAX8794ETB+ +VCC_CORE ST L6935TR RUN_ON +1.25V_RUN +0.9V_DDR_VTT RUN_ON +1.5V_RUN C C Fairchild FDS8880 RUN_ON +3.3V_RUN Fairchild FDC655BN SUS_ON +3.3V_SUS Fairchild FDS6298 Fairchild FDC655BN SUS_ON RUN_ON +5V_SUS +5V_RUN Fairchild FDS6298 RUN_ON RUN_ON +1.8V_RUN +1.05V_VCCP B B A A Title QUANTA COMPUTER Schematic Block Diagram1 5 4 3 PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com 2 Size Document Number VM9/VM8 Date: Tuesday, May 27, 2008 Rev 1A Sheet 1 46 of 53